Age | Commit message (Expand) | Author |
2020-10-05 | mb, soc: change mainboard_get_dram_part_num() prototype | Nick Vaccaro |
2020-10-05 | soc/intel/tigerlake/acpi: Convert 'pch_hda.asl' into ASL 2.0 syntax | Subrata Banik |
2020-10-05 | soc/intel/common/block/acpi: Factor out common ish.asl | Subrata Banik |
2020-10-05 | soc/intel/common/block/acpi: Factor out common platform.asl | Subrata Banik |
2020-10-05 | soc/intel/common/block/acpi: Factor out common smbus.asl | Subrata Banik |
2020-10-05 | mb/{google,intel}/{volteer,tglrvp}: Refer to common IPU ASL | Subrata Banik |
2020-10-05 | soc/intel/common/block/acpi: Factor out common pch_glan.asl | Subrata Banik |
2020-10-03 | soc/intel: Make use of PMC low power program from common block | Subrata Banik |
2020-10-03 | soc/intel: Move pch_misc_init() to common code | Subrata Banik |
2020-10-03 | soc/intel: Move soc_pch_pirq_init() to common code | Subrata Banik |
2020-10-03 | soc/intel: Move pch_enable_ioapic() to common code | Subrata Banik |
2020-10-02 | drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES config | Shelley Chen |
2020-09-30 | soc/intel/tigerlake: Set TME upd param based on config | Pratik Prajapati |
2020-09-28 | soc/intel/common/block/lpc: add acpi name | Jonathan Zhang |
2020-09-28 | util: Add new memory part for zork boards | Amanda Huang |
2020-09-27 | soc/intel/common/block/acpi: Factor out common gpio_op.asl | Subrata Banik |
2020-09-27 | soc/intel/{jsl,tgl}: Fix GRXS function to get GPIO number proper | Subrata Banik |
2020-09-26 | arch/x86: Introduce `ARCH_ALL_STAGES_X86_32` | Angel Pons |
2020-09-25 | soc/intel/tigerlake: Remove extra '_' from GPIO PIN name | Subrata Banik |
2020-09-25 | soc/intel/{jsl,tgl}: Refactor gpio_op.asl | Subrata Banik |
2020-09-24 | soc/intel/tigerlake: Add support for CnviBtCore and CnviBtAudioOffload | John Zhao |
2020-09-23 | soc/intel/tigerlake: Configure FSP UPDs for minimum assertion widths | Jamie Ryu |
2020-09-22 | Revert "soc/intel: Refactor do_global_reset() function" | Furquan Shaikh |
2020-09-21 | src/soc/intel: Drop unneeded empty lines | Elyes HAOUAS |
2020-09-21 | soc/intel: Refactor do_global_reset() function | Subrata Banik |
2020-09-21 | soc/intel: rename get_prmrr_size | Michael Niewöhner |
2020-09-19 | soc/intel/common/block/cse: Refactor cse_request_global_reset() function | Subrata Banik |
2020-09-17 | mb/volteer: Select USE_CAR_NEM_ENHANCED_V2 for Tigerlake QS based | Shreesh Chhabbi |
2020-09-14 | soc/intel/{cnl,icl,jsl,tgl}: Clean up chip.h | Subrata Banik |
2020-09-14 | soc/intel/tigerlake: Increase PRERAM_CBMEM_CONSOLE_SIZE to 8KB | Anil Kumar |
2020-09-14 | soc/intel/tigerlake: Select USE_CAR_NEM_ENHANCED_V2 for tigerlake | Shreesh Chhabbi |
2020-09-11 | soc/intel/tigerlake: Clean up systemagent.h | Subrata Banik |
2020-09-10 | soc/intel/tigerlake: Maintain consistent tab in iomap.h | Subrata Banik |
2020-09-08 | soc/intel/tigerlake: Skip GPIO configuration from FSP | Srinidhi N Kaushik |
2020-09-08 | soc/intel/tigerlake: Add SMRR Locking support | Tim Wawrzynczak |
2020-09-06 | soc/intel: skl,cnl,icl,jsl,tgl: disable usb over-current pin by default | Michael Niewöhner |
2020-09-04 | soc/intel/{jasperlake,tigerlake}/Kconfig: Drop redundant 'select CPU_INTEL_CO... | Elyes HAOUAS |
2020-09-04 | soc/intel/tigerlake: Remove unused PID_SDX macro | Subrata Banik |
2020-09-02 | soc/intel/tigerlake: Add mainboard hook for overriding SoC config | Jes Klinke |
2020-08-28 | soc/intel/tigerlake: add ddr4-spd-empty.hex | Aaron Durbin |
2020-08-28 | util: Add memory parts needed by zork boards | Rob Barnes |
2020-08-28 | util/gen_spd: translate DeviceBusWidth to die bus width | Nick Vaccaro |
2020-08-28 | util: rename lp4x spds to include "lp4x-" in name | Nick Vaccaro |
2020-08-28 | util: volteer/dedede: move generic SPDs to common location | Nick Vaccaro |
2020-08-26 | soc/intel/tigerlake: Rename pch_init() code | Alexey Buyanov |
2020-08-25 | util: Add spd_tools to generate DDR4 SPDs for TGL boards | Nick Vaccaro |
2020-08-24 | soc/intel/tigerlake: Fix IPU and Vtd config | Ravi Sarawadi |
2020-08-21 | soc/intel/tigerlake: Enable long cr50 ready pulses | Jes Klinke |
2020-08-18 | elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPE | Aaron Durbin |
2020-08-18 | src: Remove unneded whitespace before tab | Elyes HAOUAS |