coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-03-25	soc/intel/tigerlake: Configure Hyperthreading	Wonkyu Kim
2020-03-23	soc/intel/tigerlake: Update DCACHE_BSP_STACK_SIZE	Tim Wawrzynczak
2020-03-21	soc/intel/tigerlake: Make PCH_DEV_UART3 macro definition proper	Subrata Banik
2020-03-20	soc/intel: Enable GPIO functions in verstage	Bora Guvendik
2020-03-20	soc/intel/tigerlake: Enable ACPI support for PMC core OS driver	Venkata Krishna Nimmagadda
2020-03-19	soc/intel/tigerlake: add support to read SPD data from SMBus	Ronak Kanabar
2020-03-19	soc/intel/tigerlake: Update header to avoid compilation issue	Maulik V Vaghela
2020-03-18	soc/intel/tigerlake: Correct number of gpio group for Jasper Lake	Maulik V Vaghela
2020-03-18	soc/intel/tigerlake: Update FSP UPDs to turn on USB4/TBT	Brandon Breitenstein
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2020-03-17	src/soc/intel/tigerlake: Fix incorrect use of Field objects in ASL	Rizwan Qureshi
2020-03-16	soc/intel/tigerlake: Support ISH	li feng
2020-03-16	src/soc/tigerlake_dev: Update PMC IPC Hardware ID	John Zhao
2020-03-15	soc/intel/tigerlake: Match RP number with TGL EDS	Wonkyu Kim
2020-03-15	soc/intel/tigerlake: Enable CNVi through dev_enabled	Srinidhi N Kaushik
2020-03-15	soc/intel/tigerlake: Update Cpu Ratio settings	Srinidhi N Kaushik
2020-03-15	soc/intel/tigerlake: Configure Vmx support using Kconfig	John Zhao
2020-03-12	soc/intel/tigerlake: Enable VT-d and generate DMAR ACPI table	John Zhao
2020-03-12	soc/intel/*/smihandler: Only compile in TCO SMI handler if needed	Patrick Georgi
2020-03-12	soc/intel/tigerlake: Configure L1Substates for PCH Root ports	Wonkyu Kim
2020-03-12	soc/intel/tigerlake: Enable HDA through dev_enabled	Srinidhi N Kaushik
2020-03-11	soc/intel/tigerlake: Save DIMM info by available nodes	Jamie Ryu
2020-03-11	soc/intel/tigerlake: Correct FSP log interface	Ronak Kanabar
2020-03-11	soc/intel/tigerlake: Fix stale device pointer usage	Karthikeyan Ramasubramanian
2020-03-10	soc/intel: fix eist enabling	Matt Delco
2020-03-10	soc/intel/tigerlake: Enable Hybrid storage mode	Wonkyu Kim
2020-03-07	soc/intel/tigerlake: Avoid NULL pointer dereference	John Zhao
2020-03-07	intel/soc: skl,apl,cnl,icl,tgl: add INTRUDER relevant registers	Michael Niewöhner
2020-03-07	intel/soc: skl,apl,cnl,icl,tgl,common: enable TCO SMIs if selected	Michael Niewöhner
2020-03-06	soc/intel/tigerlake: Enable CNVi Mode	Srinidhi N Kaushik
2020-03-06	soc/intel/tigerlake: Avoid NULL pointer dereference	John Zhao
2020-03-04	src: capitalize 'PCIe'	Elyes HAOUAS
2020-03-04	soc/intel/tigerlake: Update SerialIoUart settings for Tiger Lake	Srinidhi N Kaushik
2020-03-03	soc/intel/tigerlake: configure ethernet	Wonkyu Kim
2020-03-03	soc/intel/tigerlake: Add Jasper lake GPIO support	Ronak Kanabar
2020-03-03	src/soc/tigerlake: Add memory configuration support for Jasper Lake	Meera Ravindranath
2020-03-02	soc/tigerlake: Correct FSP log interface	Wonkyu Kim
2020-03-01	soc/intel/{icl,jsl,tgl}: Enable PlatformDebugConsent by Kconfig	Subrata Banik
2020-02-27	soc/intel/tigerlake: Add display related UPD configs for Jasper Lake	Aamir Bohra
2020-02-27	soc/intel/tigerlake: Update FSP params for Jasper Lake	Maulik V Vaghela
2020-02-26	soc/intel/tigerlake: Integrate Legacy 8254 timer support	Subrata Banik
2020-02-25	soc/intel/common: Update Jasper Lake Device IDs	Meera Ravindranath
2020-02-25	soc/intel/common/block: Move cse common functions into block/cse	Subrata Banik
2020-02-25	soc/intel/common/block: Move smihandler common functions into common code	Subrata Banik
2020-02-19	soc/tigerlake: Add IRQ header and ACPI support for JSP	Meera Ravindranath
2020-02-17	soc/intel/tigerlake: Enable Audio on TGL	Srinidhi N Kaushik
2020-02-17	src/intel: Define HFSTS3 register	Sridhar Siricilla
2020-02-17	src/soc/tigerlake: Accomodate JSP specific changes in iomap.h	Meera Ravindranath
2020-02-17	soc/tigerlake: Add Device id for Tiger Lake Dual Core	Srinidhi N Kaushik
2020-02-17	soc/intel/{cnl,icl,skl,tgl}/bootblock: Update text for DMI PCR 2774	Wim Vervoorn