coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-05-20	tigerlake: update processor power limits configuration	Sumeet R Pawnikar
2020-05-20	soc/tigerlake: Add devicetree configurability for IomTypeCPortPadCfg	Brandon Breitenstein
2020-05-18	soc/intel/tigerlake: Add FSP UPD TcssDma0En and TcssDma1En	John Zhao
2020-05-18	soc/intel/tigerlake: Add PchHdaIDispCodecDisconnect override	Eric Lai
2020-05-18	soc/intel/tigerlake: Fix wrong operation region for CPU to PCH method	John Zhao
2020-05-18	src: Remove leading blank lines from SPDX header	Elyes HAOUAS
2020-05-14	soc/intel: Drop ABOVE_4GB_MEM_BASE_SIZE and use cpu_phys_address_size()	Furquan Shaikh
2020-05-14	soc/intel/common/block/systemagent: Use TOUUD as base for MMIO above 4G	Furquan Shaikh
2020-05-12	soc/intel/tigerlake: Correct IRQ interrupt	Wonkyu Kim
2020-05-12	device/pci_device: Extract pci_domain_set_resources from SOC	Raul E Rangel
2020-05-12	soc/intel/tigerlake: Control SATA and DMI power optimization	Shaunak Saha
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-11	soc/intel/tigerlake: Update C-State info	Wonkyu Kim
2020-05-09	src/: Replace GPL boilerplate with SPDX headers	Patrick Georgi
2020-05-08	soc/intel: Replace GPLv2 long form headers with SPDX header	Elyes HAOUAS
2020-05-07	soc/intel/tigerlake: Add PMC to platform ACPI name entry	John Zhao
2020-05-06	treewide: replace GPLv2 long form headers with SPDX header	Patrick Georgi
2020-05-06	treewide: Move "is part of the coreboot project" line in its own comment	Patrick Georgi
2020-05-06	soc/intel/tgl: Synchronize GPIO ASL table with Linux kernel	Shaunak Saha
2020-05-06	soc/intel/tigerlake: Print HPR_CAUSE0 register	derek.huang
2020-05-05	soc/intel/tigerlake: Add PMC mux control	John Zhao
2020-05-04	soc/intel/tigerlake: Update interrupt setting	Wonkyu Kim
2020-05-04	src/soc/tigerlake: Update SerialIoDebugMode UPD in FSP-M	Srinidhi N Kaushik
2020-05-02	acpi: Move ACPI table support out of arch/x86 (3/5)	Furquan Shaikh
2020-05-01	soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understa...	Subrata Banik
2020-05-01	soc/intel/tigerlake: Fill PcieRpClkReqDetect from devicetree	Meera Ravindranath
2020-05-01	src: Remove unused 'include <cpu/x86/cache.h>'	Elyes HAOUAS
2020-04-29	soc/intel/tigerlake: Check SPD is not NULL before print	Eric Lai
2020-04-29	soc/intel/tigerlake: Add method to look up GPIO com ID for an index	Venkata Krishna Nimmagadda
2020-04-28	soc/intel/tigerlake: fix call to print_spd_info()	Nick Vaccaro
2020-04-28	device: Constify struct device * parameter to write_acpi_tables	Furquan Shaikh
2020-04-25	soc/intel/tigerlake: Fix FSP SPD index for DDR4	Furquan Shaikh
2020-04-24	soc/intel/tigerlake: Add ACPI GPIO op	Alex Levin
2020-04-22	soc/intel/tigerlake: Configure TCSS power management	John Zhao
2020-04-20	soc/intel/tigerlake: Update iDisp Link UPD settings	Srinidhi N Kaushik
2020-04-20	soc/intel/tigerlake: Merge the recent change from other platforms	Wonkyu Kim
2020-04-17	soc/intel/tigerlake: Remove eMMC/SD support	Duncan Laurie
2020-04-14	soc/intel/tigerlake: Fix TCSS TBT PCIE root ports scope type	John Zhao
2020-04-14	soc/intel/tigerlake: Implement CHIPSET_LOCKDOWN	Wonkyu Kim
2020-04-14	soc/intel/tigerlake: Add function to dump ME firmware status information	Krishna Prasad Bhat
2020-04-14	soc/intel/{icl,tgl}: Make use of print_me_fw_version() from CSE lib	Krishna Prasad Bhat
2020-04-14	soc/intel/tigerlake: Configure RP setting	Wonkyu Kim
2020-04-13	acpi: Bump FADT to revision 6	Patrick Rudolph
2020-04-13	soc/intel/tigerlake: Remove scs.asl	Aamir Bohra
2020-04-11	soc/intel/tigerlake: Disable MrcSafeConfig	Srinidhi N Kaushik
2020-04-10	Replace DEVICE_NOOP with noop_(set\|read)_resources	Nico Huber
2020-04-10	Drop unnecessary DEVICE_NOOP entries	Nico Huber
2020-04-10	soc/intel/tigerlake: Add support to initialize DDR4 Memory	Varun Joshi
2020-04-07	soc/intel/tigerlake/acpi: Fix typo in HDA in comment	Subrata Banik
2020-04-07	soc/intel/tigerlake: Allow mainboard to override DRAM part number	Marco Chen