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path: root/src/soc/intel/tigerlake
AgeCommit message (Expand)Author
2020-06-25drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1Jonathan Zhang
2020-06-24soc/intel/tigerlake: Fix unresolved symbol CDW1 errorJohn Zhao
2020-06-22soc/intel/tigerlake: Add CmdMirror option in chip.hDavid Wu
2020-06-22mb/google/volteer: Override power limits with SKU-specific limitsTim Wawrzynczak
2020-06-22soc/intel/tigerlake: Update platform.asl to ASL2.0 syntaxV Sowmya
2020-06-19soc/intel/tigerlake: Update TCSS for SW CM supportJohn Zhao
2020-06-19tigerlake: add unique acpi device ids for dptfSumeet R Pawnikar
2020-06-18soc/intel/tigerlake: Enable FSP-S compressionKarthikeyan Ramasubramanian
2020-06-17soc/soch/intel/tigerlake: Integrate PCIe hot-plug config UPDWonkyu Kim
2020-06-16soc/intel/common: Replace smm_soutbridge_enable(SMI_FLAGS)Kyösti Mälkki
2020-06-16arch/x86: Create helper for APM_CNT SMI triggersKyösti Mälkki
2020-06-14soc/intel/tigerlake: enable CPU_INTEL_COMMONAlex Levin
2020-06-12soc/intel/tigerlake: Add devicetree support to change PCH VR settingsVenkata Krishna Nimmagadda
2020-06-10soc/intel/tigerlake: Add Hot-Plug and PME event handlers for ThunderboltJohn Zhao
2020-06-10ACPI: Remove Kconfig COMMON_FADTKyösti Mälkki
2020-06-09soc/intel/tigerlake: Set FSPS UPD ITbtConnectTopologyTimeoutInMsJohn Zhao
2020-06-09soc/intel/tigerlake: Increase heap sizeDuncan Laurie
2020-06-08spd/lp4x: Set manufacturer part name to blank (0x20)Furquan Shaikh
2020-06-07soc/intel/tigerlake/acpi: Update gpio_op.asl to ASL2.0 syntaxVenkata Krishna Nimmagadda
2020-06-06soc/intel/tigerlake: Add CPU ID for TGL B0Jamie Ryu
2020-06-06lp4x: Add new memory parts and generate SPDsFurquan Shaikh
2020-06-06soc/intel/tigerlake: Generate LP4x SPD files using gen_spd.goFurquan Shaikh
2020-06-03soc/tigerlake: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-06-03soc/intel/tigerlake: update elog to include CSME reset causesderek.huang
2020-06-02soc/intel/common/{pch,sata}: Remove SATA common code driverSubrata Banik
2020-06-02src: Remove unused 'include <bootstate.h>'Elyes HAOUAS
2020-06-02{icelake,jasperlake,skylake,tigerlake}/bootblock.c: Clean up includesElyes HAOUAS
2020-06-02src: Remove unused '#include <cpu/x86/lapic.h>'Elyes HAOUAS
2020-05-31soc/intel/tigerlake/acpi: Update pch_hda.asl to ASL2.0 syntaxVenkata Krishna Nimmagadda
2020-05-31soc/intel/tigerlake/acpi: Update camera_clock_ctl.asl to ASL2.0Venkata Krishna Nimmagadda
2020-05-30soc/intel/tigerlake: Configure TcssDma0En and TcssDma1EnJohn Zhao
2020-05-28soc/intel/tigerlake: Implement soc_get_pmc_mux_device()Tim Wawrzynczak
2020-05-28soc/intel/tigerlake: Generate PMC ACPI device at runtimeTim Wawrzynczak
2020-05-28soc/intel/tigerlake: Configure THCWonkyu Kim
2020-05-28soc/intel/tigerlake: Correct GPIO community PID configurationEric Lai
2020-05-28soc/intel/common: Improve Type16 SMBIOS tablesPatrick Rudolph
2020-05-27soc/intel/gma: Implement fsp_soc_get_igd_bar() in common codeNico Huber
2020-05-27soc/intel/gma: Move display and opregion init to common codeNico Huber
2020-05-27drivers/intel/gma: Move IGD OpRegion to CBMEMNico Huber
2020-05-26soc/intel/tigerlake: Remove MIPI clock setting from devicetreeSrinidhi N Kaushik
2020-05-26soc/intel/tigerlake: Delete unused configurationWonkyu Kim
2020-05-26soc/intel/tigerlake: Disable VMDWonkyu Kim
2020-05-26soc/intel/tigerlake: Add FSP UPD D3HotEnable and D3ColdEnableJohn Zhao
2020-05-26soc/intel/tigerlake: Fix wrong operation region for CPU to PCH methodJohn Zhao
2020-05-23soc/intel/{jsl,tgl}: Override PRERAM_CBMEM_CONSOLE_SIZE default valueSubrata Banik
2020-05-22soc/intel/tigerlake: Provide SoundWire controller propertiesDuncan Laurie
2020-05-22soc/intel/tigerlake: Add definition for PMC EPOCDuncan Laurie
2020-05-20tigerlake: enable DPTF functionality for volteerSumeet R Pawnikar
2020-05-20soc/intel/tigerlake: Add TCSS devices to soc_acpi_name()Duncan Laurie
2020-05-20soc/intel/tigerlake: Move pmc_soc_set_afterg3_en to pmutilTim Wawrzynczak