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Some coreboot project code with my work
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tigerlake
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2020-08-09
soc/intel/{icl.tgl,jsl}: Remove SMRAM register programming
Aamir Bohra
2020-08-07
soc/intel/{cnl,icl,jsl,tgl}: Use Bus Master for setting up PWRMBASE
Subrata Banik
2020-08-06
soc/intel/tigerlake: add common routine for DDR init
Nick Vaccaro
2020-08-05
{nb,soc}/intel: Use get_current_microcode_rev() for ucode version
Subrata Banik
2020-08-03
soc/intel/tigerlake: Invoke PCIe root port swapping
Caveh Jalali
2020-08-01
soc/intel/{icl,jsl,tgl}: Remove SkipMpInit UPD as deprecated
Subrata Banik
2020-07-29
soc/intel/tigerlake: Configure TCSS D3Hot and D3Cold
John Zhao
2020-07-29
soc/intel/tigerlake: Set default USB3 de-emphasis to -3.5dB
Duncan Laurie
2020-07-28
soc/intel/tigerlake: Simplify is-device-enabled checks
Felix Singer
2020-07-26
soc/intel/tigerlake: Disable CPU PCIe in FSP
Shaunak Saha
2020-07-26
soc/intel/tigerlake: Disable VT-d and no DMAR table for pre-QS platform
John Zhao
2020-07-26
src/soc/intel: Add include <types.h>
Elyes HAOUAS
2020-07-26
src: Update bare access to BOOL CONFIG_ vals to CONFIG()
Martin Roth
2020-07-26
cpu,soc/intel: Drop select SMP
Kyösti Mälkki
2020-07-26
src: Remove unused 'include <cbmem.h>'
Elyes HAOUAS
2020-07-26
src: Remove extra lines in license header
Elyes HAOUAS
2020-07-25
soc/intel/tigerlake: Update Pkg C-State latencies
Ravi Sarawadi
2020-07-25
soc/intel/tigerlake: Set power limits for Tiger Lake Y-SKU
Sumeet R Pawnikar
2020-07-25
soc/intel/tigerlake: Update Tiger Lake SA IDs
Derek Huang
2020-07-21
soc/intel/tigerlake: Select PLATFORM_USES_FSP2_2
Subrata Banik
2020-07-21
src: Use ACPI macros
Elyes HAOUAS
2020-07-15
soc/intel/tigerlake: Hook up SATA Port Enable DITO UPDs
Shaunak Saha
2020-07-14
src: Remove unused 'include <stdint.h>
Elyes HAOUAS
2020-07-12
soc/intel/tigerlake: Move tco_configure to bootblock
Tim Wawrzynczak
2020-07-12
soc/intel/tigerlake: Configure Type-C Input Output Manager(IOM) device
John Zhao
2020-07-12
soc/intel/tigerlake: Add Type-C IOM base address and size macro
John Zhao
2020-07-12
soc/intel/tigerlake: Add new IGD device
Ravi Sarawadi
2020-07-09
mainboard/intel/tglrvp: Remove unused PrmrrSize chip config
Subrata Banik
2020-07-07
soc/intel/common/block: Add new block DTT
Tim Wawrzynczak
2020-07-07
soc/intel/tigerlake: Disable Thunderbolt PCIe root ports bus master
John Zhao
2020-07-07
soc/intel/{tiger,jasper}lake: Add IPU to soc_acpi_name
Tim Wawrzynczak
2020-07-07
lp4x: Add new memory parts and generate SPDs
David Wu
2020-07-06
soc/intel: Drop unused `#include <reg_script.h>`
Angel Pons
2020-07-04
soc/intel/tigerlake: Remove unused EHL DID from TGL SoC
Subrata Banik
2020-07-03
soc/intel/tigerlake: Disable hybrid storage mode in CSE Lite RO boot
Jamie Ryu
2020-07-03
drivers/intel/pmx_mux: Remove redundant declaration
Kyösti Mälkki
2020-07-01
soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4
John Zhao
2020-06-30
tigerlake: enable tcc_offset functionality
Sumeet R Pawnikar
2020-06-30
ACPI: Drop typedef global_nvs_t
Kyösti Mälkki
2020-06-30
soc/intel/tigerlake: Add CpuReplacementCheck to chip options
Jamie Ryu
2020-06-30
soc/intel/tigerlake: Avoid NULL pointer dereference
John Zhao
2020-06-30
src: Remove whitespaces before tabs
Elyes HAOUAS
2020-06-29
soc/intel/tigerlake: Run pmc_set_acpi_mode() during .init in pmc_ops
William Wei
2020-06-25
drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1
Jonathan Zhang
2020-06-24
soc/intel/tigerlake: Fix unresolved symbol CDW1 error
John Zhao
2020-06-22
soc/intel/tigerlake: Add CmdMirror option in chip.h
David Wu
2020-06-22
mb/google/volteer: Override power limits with SKU-specific limits
Tim Wawrzynczak
2020-06-22
soc/intel/tigerlake: Update platform.asl to ASL2.0 syntax
V Sowmya
2020-06-19
soc/intel/tigerlake: Update TCSS for SW CM support
John Zhao
2020-06-19
tigerlake: add unique acpi device ids for dptf
Sumeet R Pawnikar
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