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path: root/src/soc/intel/xeon_sp/include
AgeCommit message (Expand)Author
2020-07-12soc/intel/xeon_sp: Add RTC failure checkingJingle Hsu
2020-06-28soc/intel/common: add TCC activation functionalitySumeet R Pawnikar
2020-06-04soc/intel/xeon_sp/cpx: add chip operation and PCIe enumerationJonathan Zhang
2020-06-02soc/intel/xeon_sp: Early programming of ACPI barRocky Phagura
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-11soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKXMichael Niewöhner
2020-05-06treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi
2020-05-06treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi
2020-05-01soc/intel/xeon_sp: Add C620 p2sb.hAndrey Petrov
2020-04-07soc/intel/xeon_sp: Add Lewisburg defs for common/gpio driverMaxim Polyakov
2020-03-26soc/intel/xeon_sp: Refactor code to allow for additional CPUs typesAndrey Petrov
2020-03-25soc/intel/xeon_sp: Enable LPC generic IO decode rangeJohnny Lin
2020-03-18soc: Remove copyright noticesPatrick Georgi
2020-03-06soc/intel: Add Intel Xeon Scalable Processor supportJonathan Zhang