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path: root/src/soc/intel
AgeCommit message (Expand)Author
2020-09-12soc/intel/common/block/*/Kconfig: Guard options with if-blocksAngel Pons
2020-09-12soc/intel/denverton_ns/uart_debug: include header for uart_platform_baseFelix Held
2020-09-12include/console/uart: make index parameter unsignedFelix Held
2020-09-11soc/intel/tigerlake: Clean up systemagent.hSubrata Banik
2020-09-10soc/intel/alderlake: Rename pch_init() codeSubrata Banik
2020-09-10soc/intel/tigerlake: Maintain consistent tab in iomap.hSubrata Banik
2020-09-09soc/intel/common/block/imc: Drop unused codeAngel Pons
2020-09-09soc/intel/common/block/uart/Kconfig: Drop unused symbolsAngel Pons
2020-09-09soc/intel/xeon_sp: Select CPU_INTEL_COMMONAngel Pons
2020-09-09soc/intel/cannonlake: Add PCIe ports on PCH-HPatrick Rudolph
2020-09-09apollolake: Define MAX_CPUS at SoC scopeAngel Pons
2020-09-09geminilake: Factor out MAX_CPUS valueAngel Pons
2020-09-09soc/intel/apollolake: Rename `SOC_INTEL_GLK` symbolAngel Pons
2020-09-09vendorcode/intel/fsp/fsp2_0/adl: Add FSP header file version 1332Subrata Banik
2020-09-08pci_ids: Add Alder Lake DTT PCI IDsSubrata Banik
2020-09-08pci_ids: Add Alder Lake IPU PCI IDsSubrata Banik
2020-09-08soc/intel/baytrail: Add missing GSM size definitionsAngel Pons
2020-09-08soc/intel/denverton_ns/Kconfig: Drop unused 'IQAT_MEMORY_REGION_SIZE'Elyes HAOUAS
2020-09-08soc/intel/tigerlake: Skip GPIO configuration from FSPSrinidhi N Kaushik
2020-09-08soc/intel/elkhartlake: Update SA & PM related definitionsTan, Lean Sheng
2020-09-08soc/intel/elkhartlake: Update PMC related register definitionsTan, Lean Sheng
2020-09-08soc/intel/elkhartlake: Add CPU, SA, PCH & IGD DIDs TableTan, Lean Sheng
2020-09-08soc/intel/elkhartlake/acpi: Copy acpi directory from jasperlakeTan, Lean Sheng
2020-09-08soc/intel/elkhartlake: Do initial SoC commit till ramstageTan, Lean Sheng
2020-09-08soc/intel/apollolake: Hook up ENABLE_VMXAngel Pons
2020-09-08soc/intel/apollolake: Select CPU_INTEL_COMMONAngel Pons
2020-09-08soc/intel/broadwell: Drop `gpu_panel_port_select`Angel Pons
2020-09-08soc/intel/tigerlake: Add SMRR Locking supportTim Wawrzynczak
2020-09-08soc/intel/common: Add SMRR Lock Supported bit definition for MTRR_CAPTim Wawrzynczak
2020-09-06soc/intel/apl: Add panel power and backlight configurationNico Huber
2020-09-06soc/intel: skl,cnl,icl,jsl,tgl: disable usb over-current pin by defaultMichael Niewöhner
2020-09-05soc/intel/alderlake/bootblock: Do initial SoC commit till bootblockSubrata Banik
2020-09-04soc/intel/{jasperlake,tigerlake}/Kconfig: Drop redundant 'select CPU_INTEL_CO...Elyes HAOUAS
2020-09-04soc/intel/cnl: Enable HECI3 depending on devicetreeFelix Singer
2020-09-04soc/intel/tigerlake: Remove unused PID_SDX macroSubrata Banik
2020-09-03soc/intel/cnl: Allow using the remaining Comet Lake FSPsFelix Singer
2020-09-033rdparty/fsp: Update submodule pointer to current masterFelix Singer
2020-09-03soc/intel/cnl: Add new Kconfig option which matches its FSPs nameFelix Singer
2020-09-02soc/intel/tigerlake: Add mainboard hook for overriding SoC configJes Klinke
2020-09-02soc/intel/xeon_sp/Kconfig: Drop redundant 'select POSTCAR_CONSOLE'Elyes HAOUAS
2020-09-02{nb,soc}/intel/{haswell,broadwell}/memmap.c: Use ALIGN_DOWN(x, a)Elyes HAOUAS
2020-09-01{include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistentSubrata Banik
2020-08-31soc/intel/elkhartlake/romstage: Do initial SoC commit till romstageTan, Lean Sheng
2020-08-31soc/intel/elkhartlake/bootblock: Do initial SoC commit until bootblockTan, Lean Sheng
2020-08-29PCI IDs: Add PCI ID for CML DPTF/DTT PCI deviceEdward O'Callaghan
2020-08-28vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww34 release and adapt socJonathan Zhang
2020-08-28soc/intel/tigerlake: add ddr4-spd-empty.hexAaron Durbin
2020-08-28util: Add memory parts needed by zork boardsRob Barnes
2020-08-28util/gen_spd: translate DeviceBusWidth to die bus widthNick Vaccaro
2020-08-28util: rename lp4x spds to include "lp4x-" in nameNick Vaccaro