coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2014-08-28	soc/intel/baytrail/Kconfig: Remove empty line at top file	Paul Menzel
2014-08-15	Move baytrail-specific config to baytrail.	Vladimir Serbinenko
2014-08-11	soc/intel/fsp_baytrail: set up for including irqroute.h twice	Martin Roth
2014-08-01	fsp_baytrail/.../gpio.h: Add GPIO_NC1 for GPIOS on func 1	Martin Roth
2014-07-23	src/.../Kconfig: various small fixes to texts	Daniele Forsi
2014-07-17	soc,Makefile.inc: Trivial - drop trailing blank lines at EOF	Edward O'Callaghan
2014-07-17	soc,ASL: Trivial - drop trailing blank lines at EOF	Edward O'Callaghan
2014-07-14	SPI: Split writes using spi_crop_chunk()	Kyösti Mälkki
2014-07-08	soc: Trivial - drop trailing blank lines at EOF	Edward O'Callaghan
2014-07-05	spi: Change spi_xfer to work in units of bytes instead of bits.	Gabe Black
2014-07-05	spi: Remove unused parameters from spi_flash_probe and setup_spi_slave.	Gabe Black
2014-06-23	baytrail_fsp: Fix the mmconf Kconfig	Martin Roth
2014-06-23	fsp_baytrail: Minor Kconfig updates	Martin Roth
2014-06-21	intel boards: Use acpi_is_wakeup_s3()	Kyösti Mälkki
2014-06-18	fsp_baytrail: Add the default FSP location	Martin Roth
2014-06-18	fsp_baytrail: Add Baytrail B0/B1 "Super SKU" microcode	Martin Roth
2014-06-18	ACPI: Remove CBMEM TOC from GNVS	Kyösti Mälkki
2014-06-13	fsp_baytrail: remove version from default vbios path	Martin Roth
2014-06-13	fsp_baytrail: Fix CONFIG_ENABLE_FSP_FAST_BOOT	Martin Roth
2014-05-30	cpu/intel/fsp_model_206ax: change realpath to readlink	Martin Roth
2014-05-29	fsp_baytrail: Add the FSP version of Intel's Bay Trail-I chip	Martin Roth
2014-05-17	build: separate CPPFLAGS from CFLAGS	Patrick Georgi
2014-05-17	build: CPPFLAGS is more common than INCLUDES	Patrick Georgi
2014-05-15	baytrail: Add SOC thermal settings	Duncan Laurie
2014-05-15	baytrail: Enable PCIe common clock and ASPM	Duncan Laurie
2014-05-15	baytrail: enable graphics turbo	Aaron Durbin
2014-05-15	baytrail: use CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED	Aaron Durbin
2014-05-15	baytrail: Add ACPI Device for XHCI	Duncan Laurie
2014-05-15	baytrail: nvm: use proper types for checking erase	Aaron Durbin
2014-05-15	baytrail: mrc_cache: check region erased before erasing	Aaron Durbin
2014-05-13	baytrail: add C0 microcode update	Aaron Durbin
2014-05-13	baytrail: reboot with EC in S0 with no MRC cache and EC in RW	Aaron Durbin
2014-05-13	baytrail: dptf: Add disable trip point methods	Duncan Laurie
2014-05-13	baytrail: Updates for DPTF ACPI framework	Duncan Laurie
2014-05-13	baytrail: don't SMI on tco timer firing	Aaron Durbin
2014-05-13	baytrail: clear the pmc wake status registers	Aaron Durbin
2014-05-13	baytrail: log reset, power, and wake events in elog	Aaron Durbin
2014-05-13	baytrail: snapshot power state in romstage	Aaron Durbin
2014-05-13	baytrail: add cpuid for C0	Aaron Durbin
2014-05-12	baytrail: align with intel recommendations	Aaron Durbin
2014-05-12	baytrail: add way to load reference code from vboot area	Aaron Durbin
2014-05-12	baytrail: Expose IOSF as ACPI object	Duncan Laurie
2014-05-12	baytrail: Put devices in ACPI mode after setup	Duncan Laurie
2014-05-12	baytrail: Add header include wrapper and offset define	Duncan Laurie
2014-05-10	baytrail: cache reference code for S3 resume	Aaron Durbin
2014-05-10	baytrail: allow ramstage_cache_location() usage in ramstage	Aaron Durbin
2014-05-10	baytrail: note S3 resume status earlier	Aaron Durbin
2014-05-10	baytrail: utilize reg_script_run_on_dev()	Aaron Durbin
2014-05-10	baytrail: initialize perf/power registers	Aaron Durbin
2014-05-10	baytrail: add more iosf access functions	Aaron Durbin