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path: root/src/soc/intel
AgeCommit message (Expand)Author
2020-05-26soc/intel/xeon_sp: select UDK_2017_bindingJonathan Zhang
2020-05-26soc/intel/tigerlake: Remove MIPI clock setting from devicetreeSrinidhi N Kaushik
2020-05-26soc/intel/tigerlake: Delete unused configurationWonkyu Kim
2020-05-26soc/intel/tigerlake: Disable VMDWonkyu Kim
2020-05-26apollolake: update processor power limits configurationSumeet R Pawnikar
2020-05-26soc/intel/tigerlake: Add FSP UPD D3HotEnable and D3ColdEnableJohn Zhao
2020-05-26soc/intel/skylake/acpi/smbus.asl: Fix typo in commentElyes HAOUAS
2020-05-26Remove MAYBE_STATIC_BSS and ENV_STAGE_HAS_BSS_SECTIONKyösti Mälkki
2020-05-26cannonlake: update processor power limits configurationSumeet R Pawnikar
2020-05-26soc/intel/tigerlake: Fix wrong operation region for CPU to PCH methodJohn Zhao
2020-05-26soc/intel/cannonlake: Add VrPowerDeliveryDesign to chip optionsChristian Walter
2020-05-26intel/cannonlake: Implement PCIe RP devicetree updateNico Huber
2020-05-26soc/intel/jasperlake: correct IRQ routing Jasper LakeRonak Kanabar
2020-05-23soc/intel/broadwell: Use SPDX identifierJacob Garber
2020-05-23soc/intel/common/block: Update SA resource length to support 64 bitSubrata Banik
2020-05-23soc/intel/{jsl,tgl}: Override PRERAM_CBMEM_CONSOLE_SIZE default valueSubrata Banik
2020-05-22soc/intel/tigerlake: Provide SoundWire controller propertiesDuncan Laurie
2020-05-22soc/intel/tigerlake: Add definition for PMC EPOCDuncan Laurie
2020-05-21soc/intel/tigerlake: Make audio devices scan the busDuncan Laurie
2020-05-20tigerlake: enable DPTF functionality for volteerSumeet R Pawnikar
2020-05-20soc/intel/tigerlake: Add TCSS devices to soc_acpi_name()Duncan Laurie
2020-05-20soc/intel/tigerlake: Move pmc_soc_set_afterg3_en to pmutilTim Wawrzynczak
2020-05-20soc/intel/tigerlake: Move PMC PCI resources under PMC deviceTim Wawrzynczak
2020-05-20tigerlake: update processor power limits configurationSumeet R Pawnikar
2020-05-20icelake: remove unused processor power limits configurationSumeet R Pawnikar
2020-05-20soc/tigerlake: Add devicetree configurability for IomTypeCPortPadCfgBrandon Breitenstein
2020-05-20soc/intel/jasperlake: Add ACPI method to get GPIO PCR PIDAamir Bohra
2020-05-20soc/intel/common/acpi: Remove gpio community rangeAamir Bohra
2020-05-20soc/intel/broadwell: Mask lower 20 bits of TOLUD and TOLM in systemagent.aslFurquan Shaikh
2020-05-20soc/intel/broadwell: Update systemagent.asl to ASL2.0 syntaxFurquan Shaikh
2020-05-20soc/intel/skylake: Mask lower 20 bits of TOLUD and TOLM in systemagent.aslFurquan Shaikh
2020-05-20soc/intel/skylake: Update systemagent.asl to ASL2.0Furquan Shaikh
2020-05-20soc/intel/common/block/acpi: Fix error in shift operation for GPCLFurquan Shaikh
2020-05-18src: Remove unused 'include <string.h>'Elyes HAOUAS
2020-05-18src: Remove unused 'include <lib.h>'Elyes HAOUAS
2020-05-18soc/intel/tigerlake: Add FSP UPD TcssDma0En and TcssDma1EnJohn Zhao
2020-05-18broadwell: update processor power limits configurationSumeet R Pawnikar
2020-05-18soc/intel/jasperlake: Add function to display ME firmware status infoKrishna Prasad Bhat
2020-05-18soc/intel/tigerlake: Add PchHdaIDispCodecDisconnect overrideEric Lai
2020-05-18skylake: update processor power limits configurationSumeet R Pawnikar
2020-05-18soc/intel/common/block/smbus: Use i2c read eeprom to speedup SPD readWim Vervoorn
2020-05-18jasperlake: update processor power limits configurationSumeet R Pawnikar
2020-05-18soc/intel/common: add processor power limits control supportSumeet R Pawnikar
2020-05-18soc/intel/tigerlake: Fix wrong operation region for CPU to PCH methodJohn Zhao
2020-05-18src: Remove leading blank lines from SPDX headerElyes HAOUAS
2020-05-17soc/intel/common: Rename cse_is_hfs3_fw_sku_custom()Sridhar Siricilla
2020-05-17soc/intel/common/block/acpi: Mask lower 20 bits of TOLUDFurquan Shaikh
2020-05-17soc/intel/common/block/acpi: Update northbridge.asl to ASL2.0 syntaxFurquan Shaikh
2020-05-15soc/intel: Correct comment on HMRFPO_ENABLE HECI commandSridhar Siricilla
2020-05-14soc/intel: Drop ABOVE_4GB_MEM_BASE_SIZE and use cpu_phys_address_size()Furquan Shaikh