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path: root/src/soc/intel
AgeCommit message (Expand)Author
2020-09-02soc/intel/xeon_sp/Kconfig: Drop redundant 'select POSTCAR_CONSOLE'Elyes HAOUAS
2020-09-02{nb,soc}/intel/{haswell,broadwell}/memmap.c: Use ALIGN_DOWN(x, a)Elyes HAOUAS
2020-09-01{include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistentSubrata Banik
2020-08-31soc/intel/elkhartlake/romstage: Do initial SoC commit till romstageTan, Lean Sheng
2020-08-31soc/intel/elkhartlake/bootblock: Do initial SoC commit until bootblockTan, Lean Sheng
2020-08-29PCI IDs: Add PCI ID for CML DPTF/DTT PCI deviceEdward O'Callaghan
2020-08-28vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww34 release and adapt socJonathan Zhang
2020-08-28soc/intel/tigerlake: add ddr4-spd-empty.hexAaron Durbin
2020-08-28util: Add memory parts needed by zork boardsRob Barnes
2020-08-28util/gen_spd: translate DeviceBusWidth to die bus widthNick Vaccaro
2020-08-28util: rename lp4x spds to include "lp4x-" in nameNick Vaccaro
2020-08-28util: volteer/dedede: move generic SPDs to common locationNick Vaccaro
2020-08-27soc/intel/common: Include Elkhart Lake SA IDsTan, Lean Sheng
2020-08-27soc/intel/common: Add Elkhart Lake B0 CPU IDTan, Lean Sheng
2020-08-26soc/intel/tigerlake: Rename pch_init() codeAlexey Buyanov
2020-08-25util: Add spd_tools to generate DDR4 SPDs for TGL boardsNick Vaccaro
2020-08-25soc/intel/jasperlake: Disable multiphase SI initRonak Kanabar
2020-08-25soc/intel/jasperlake: Select PLATFORM_USES_FSP2_2Ronak Kanabar
2020-08-24mrc_cache: Add mrc_cache fetch functions to support non-x86 platformsShelley Chen
2020-08-24soc/intel/jasperlake: Run pmc_set_acpi_mode() during .init in pmc_opsKane Chen
2020-08-24soc/intel/tigerlake: Fix IPU and Vtd configRavi Sarawadi
2020-08-24soc/intel/jasperlake: use UDK_202005_BINDINGRonak Kanabar
2020-08-24soc/intel/common: Add downgrade support for CSE FirmwareSridhar Siricilla
2020-08-23soc/intel/cnl: Configure FSP option PcieRpSlotImplementedNico Huber
2020-08-21SMM: Validate more user-provided pointersPatrick Rudolph
2020-08-21soc/intel/tigerlake: Enable long cr50 ready pulsesJes Klinke
2020-08-21soc/intel/apollolake: Select HAVE_ASAN_IN_ROMSTAGEHarshit Sharma
2020-08-20cse_lite: Move global reset after MRC writebackCaveh Jalali
2020-08-20soc/intel/xeon_sp/cpx/Kconfig: Relocate 'select CACHE_MRC_SETTINGS'Elyes HAOUAS
2020-08-18elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPEAaron Durbin
2020-08-18soc/intel/jasperlake: Fix PMC_GPE_DW mappingMeera Ravindranath
2020-08-18soc/intel/jasperlake: Increase PRERAM_CBMEM_CONSOLE_SIZE to 5KBMeera Ravindranath
2020-08-18src: Remove unused 'include <delay.h>'Elyes HAOUAS
2020-08-18src: Remove unused 'include <lib.h>'Elyes HAOUAS
2020-08-18soc/intel/common/block/pmc/pmclib.c: Remove unused '<pc80/mc146818rtc.h>'Elyes HAOUAS
2020-08-18src: Remove unused 'include <stddef.h>Elyes HAOUAS
2020-08-18src: Remove unneded whitespace before tabElyes HAOUAS
2020-08-18xeon_sp/cpx: Fix get_system_memory_map to return the correct addressJohnny Lin
2020-08-18xeon_sp/cpx: Enable ACPI P-state supportJingle Hsu
2020-08-18soc/intel/jasperlake: Configure IPU based on devicetreeMaulik V Vaghela
2020-08-18soc/intel/common: Add support for LPSS UART in ACPI modePatrick Rudolph
2020-08-17soc/intel/skylake/acpi.c: Name devices on secondary busBenjamin Doron
2020-08-17soc/intel/tigerlake: Allow fine grained control of S0iX statesJes Klinke
2020-08-17{soc/intel/common,sb/intel/lynxpoint}/hda_verb.c: Reduce differencesElyes HAOUAS
2020-08-17soc/intel/common: Move common HDA registers to <device/azalia_device.h>Elyes HAOUAS
2020-08-17soc/intel/skylake: Call mainboard ACPI sleep methodsBenjamin Doron
2020-08-17soc/intel/jasperlake: Add IGD Device IDKrishna Prasad Bhat
2020-08-17soc/intel/jasperlake: Add FSP UPDs for minimum assertion widthsV Sowmya
2020-08-14soc/intel/tigerlake: Increase PRERAM_CBMEM_CONSOLE_SIZE to 5KBRavi Sarawadi
2020-08-14soc/intel/skylake: Refactor PEG configurationFelix Singer