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path: root/src/soc/intel
AgeCommit message (Expand)Author
2015-04-10baytrail: add code for supporting 2x ddr refresh rateKane Chen
2015-04-10broadwell: Add configuration for tuning VR for C-state operationsDuncan Laurie
2015-04-10broadwell: Preserve VbNv around cmos_initDuncan Laurie
2015-04-10broadwell: Add function to apply PRR to a range of SPI flashDuncan Laurie
2015-04-10broadwell: Turn off panel backlight in S5 SMI handlerDuncan Laurie
2015-04-10broadwell: Skip steps when disabling PCIe portDuncan Laurie
2015-04-10broadwell: Remove XHCI workarounds on WPTDuncan Laurie
2015-04-10broadwell: Only do pre-graphics delay when running option romDuncan Laurie
2015-04-10broadwell: Fix PCIe ports programming sequences to enable HSIOPCWenkai Du
2015-04-10broadwell: Update SATA Gen3 TX adjustment registersDuncan Laurie
2015-04-10broadwell: Add a few bits to finalize stepDuncan Laurie
2015-04-10baytrail: fix the coding error on PCIe L1 exit latencyKevin L Lee
2015-04-10Baytrail: Prior to PCI scan, wait for LCTL to be active in 50 msKevin Hsieh
2015-04-10Broadwell: Set boot_mode of pei_data before running reference codeKenji Chen
2015-04-10broadwell: Increase I2C SDA hold timing to 300nsChiranjeevi Rapolu
2015-04-10broadwell: add RCBA posting read after writingWenkai Du
2015-04-10Broadwell: Synchronization with FRC for Root Port Power ManagementKenji Chen
2015-04-10broadwell: Skip DDI-A enable in S3 resumeDuncan Laurie
2015-04-10broadwell: Add support for ACPI \_GPE._SWSDuncan Laurie
2015-04-10baytrail: Switch from ACPI mode to PCI mode for legacy supportMarc Jones
2015-04-08console: fix Kconfig usesPatrick Georgi
2015-04-07broadwell: Change all SoC headers to <soc/headername.h> systemJulius Werner
2015-04-07baytrail: Change all SoC headers to <soc/headername.h> systemJulius Werner
2015-04-07kconfig: drop intermittend forwarder filesStefan Reinauer
2015-04-06baytrail: Fix hdmi audio choppy issueKein Yuan
2015-04-06baytrail: reinitialize spi controller in SMM finalizationAaron Durbin
2015-04-04build system: rename __BOOT_BLOCK__ and __VER_STAGE__Patrick Georgi
2015-04-04broadwell: Enable turbo ratio if availableDuncan Laurie
2015-04-04Broadwell: Pass TSC value to romstage_mainLee Leahy
2015-04-04broadwell: fix typo in pei_dataDuncan Laurie
2015-04-04broadwell: Add USB3 PHY tuning fields to PEI DATADuncan Laurie
2015-04-04Baytrail: Fix no_dev_behind_port not executed for RP1/2/3.Kenji Chen
2015-04-04Broadwell: Fix PCIe L1 Sub-State capability ID not filled.Kenji Chen
2015-04-04broadwell: Fix building with USE=quiet-cbDuncan Laurie
2015-04-03rmodule: use struct prog while loading rmodulesAaron Durbin
2015-04-02Broadwell: Select PCIE_L1_SUB_STATE and apply Broadwell settings.Kenji Chen
2015-04-02broadwell: Disable ADSP power gating feature by defaultDuncan Laurie
2015-04-02broadwell: Add event log entry for GPIO27Duncan Laurie
2015-04-02Broadwell: Reg_Script: add END tag to array "smbus_init_script"Ryan Lin
2015-04-02Broadwell: Synchronize for power management with FRCKenji Chen
2015-04-02Broadwell: Synchronize RO, Link Arbiter, and OBFF with FRCKenji Chen
2015-04-02Broadwell: Revise programming flow for write-once registersKenji Chen
2015-04-02broadwell: Configure IOSF Port and Grant CountKenji Chen
2015-04-02Samus: Synchronization with FRC to enable PCIe Relaxed Order.Kenji Chen
2015-04-02baytrail: Change USB3 PLL VCO and iCLK PLL current on BYT-M/D CPUKein Yuan
2015-04-02broadwell: Update PCIe configuration to follow BWGKane Chen
2015-04-02broadwell: Clear pending GPE events before entering sleep stateDuncan Laurie
2015-04-02Baytrail: Change PCIe root disable algorithmKenji Chen
2015-04-02Baytrail: add _PRT to each PCIe root port deviceTed Kuo
2015-04-02broadwell: Add reporting of broadwell MCH revisionDuncan Laurie
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