| Age | Commit message (Expand) | Author |
|---|
| 2021-02-13 | intel/broadwell,lynxpoint: Use HPTS() for HPET visibility | Kyösti Mälkki |
| 2021-02-12 | soc/intel/broadwell: Use southbridge common RCBA | Angel Pons |
| 2021-02-11 | ACPI: Move PICM declaration | Kyösti Mälkki |
| 2021-02-11 | sb,soc/intel: Drop OSYS from GNVS | Kyösti Mälkki |
| 2021-02-11 | mainboards: Drop PWRS from GNVS | Kyösti Mälkki |
| 2021-02-11 | src: Remove unused <arch/cpu.h> | Elyes HAOUAS |
| 2021-02-11 | soc/intel/broadwell: Remove _ADR from SerialIO ACPI devices | Angel Pons |
| 2021-02-11 | soc/intel/xeon_sp; Remove unneeded whitespace before tab | Elyes HAOUAS |
| 2021-02-10 | soc/intel/xeon_sp/include/soc/acpi_asl.h: Convert to ASL 2.0 | Elyes HAOUAS |
| 2021-02-10 | soc/intel/skylake: Convert to ASL 2.0 syntax | Elyes HAOUAS |
| 2021-02-10 | soc/intel/skylake/acpi: Add PEP table | Benjamin Doron |
| 2021-02-10 | soc/intel/broadwell/pch: Simplify PCI RMW operations | Angel Pons |
| 2021-02-10 | soc/intel/broadwell: Use common MADT code | Angel Pons |
| 2021-02-10 | soc/intel/broadwell/pch: Drop `acpi_sci_irq` function | Angel Pons |
| 2021-02-10 | soc/intel/{cnl,skl}: Add alignment check for TSEG base and size | Benjamin Doron |
| 2021-02-10 | soc/intel/tgl: Update S0ix enable mask based on SoC and mainboard design | Shreesh Chhabbi |
| 2021-02-10 | src: Remove unused <boot_device.h> | Elyes HAOUAS |
| 2021-02-09 | soc/amd,intel: Drop s3_resume parameter on FSP-S functions | Kyösti Mälkki |
| 2021-02-09 | drivers/intel/fsp1_1,fsp2_0: Refactor logo display | Kyösti Mälkki |
| 2021-02-08 | soc/intel/{baytrail,broadwell}: Add missing <cbmem.h> | Angel Pons |
| 2021-02-08 | soc/intel/braswell,skylake: Drop logo parameters from devicetree | Kyösti Mälkki |
| 2021-02-08 | soc/intel: Drop CID1 from GNVS | Kyösti Mälkki |
| 2021-02-07 | soc/intel/broadwell/include/soc/me.h: Clean includes | Elyes HAOUAS |
| 2021-02-07 | soc/intel/quark/storage_test.c: Remove redundant <commonlib/cbmem_id.h> | Elyes HAOUAS |
| 2021-02-07 | acpi: Fix BERT size_t printf format error | Benjamin Doron |
| 2021-02-07 | soc/intel/alderlake: Increase VBT size to 9 KiB | Maulik V Vaghela |
| 2021-02-07 | soc/intel/broadwell: Use common {DMI,EP,MCH}BAR accessors | Angel Pons |
| 2021-02-07 | soc/intel/broadwell: Convert to ASL 2.0 syntax | Elyes HAOUAS |
| 2021-02-06 | drivers/intel/fsp2_0: Add support for MP services2 PPI | Aamir Bohra |
| 2021-02-06 | intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI | Furquan Shaikh |
| 2021-02-06 | intel: Drop FSP_PEIM_TO_PEIM_INTERFACE | Furquan Shaikh |
| 2021-02-06 | soc/intel/broadwell: Conditionally skip PRE_GRAPHICS_DELAY | Kyösti Mälkki |
| 2021-02-06 | sb,soc/intel: Add wake source fields in GNVS | Kyösti Mälkki |
| 2021-02-05 | soc/intel/broadwell: Convert some CONFIG(CHROMEOS) preprocessor | Kyösti Mälkki |
| 2021-02-05 | soc/intel/xeon_sp/cpx: Override SMBIOS type 4 max speed | Tim Chu |
| 2021-02-05 | soc/intel/skylake/acpi/irqlinks.asl: Fix typo in comment | Elyes HAOUAS |
| 2021-02-05 | soc/intel/alderlake: Refactor PCIE port config | Eric Lai |
| 2021-02-05 | soc/intel/broadwell/pch/lpc.c: Program GEN_PMCON_3 in one write | Angel Pons |
| 2021-02-04 | drivers/intel/fsp2_0: Fix running on x86_64 | Patrick Rudolph |
| 2021-02-04 | acpi: Add support for reporting CrashLog in BERT table | Francois Toguo |
| 2021-02-04 | soc/intel/tigerlake: Drops 100ms delay in TBT PCIe root ports _PS0 | John Zhao |
| 2021-02-04 | src: Remove unused <bootstate.h> | Elyes HAOUAS |
| 2021-02-03 | soc/intel/tgl: Add configurable value for ConfigTdpLevel | Derek Huang |
| 2021-02-03 | pci_ids/intel: Add missing CFL-S GT1 IGD IDs | Nico Huber |
| 2021-02-03 | pci_ids/intel: Correct 0x3e96, it's a CFL-S part | Nico Huber |
| 2021-02-03 | src: Remove unused <cbmem.h> | Elyes HAOUAS |
| 2021-02-03 | intel/xeon_sp: Select TPM_STARTUP_IGNORE_POSTINIT if INTEL_TXT is selected | Johnny Lin |
| 2021-02-03 | soc/intel: Fix compilation on x86_64 | Patrick Rudolph |
| 2021-02-02 | soc/intel/baytrail,braswell: Drop TOLM from GNVS | Kyösti Mälkki |
| 2021-02-02 | soc/intel/baytrail,braswell: Sync PCI memory region in ASL | Kyösti Mälkki |
