coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-11-22	soc/intel/common/pmc.c Don't implement a weak function that dies	Arthur Heymans
2020-11-22	soc/intel/block/pmc: Only include the PCI driver when it is not hidden	Arthur Heymans
2020-11-22	soc/intel/block/pmc: Move pmc_set_acpi_mode() to pmc_lib.c	Arthur Heymans
2020-11-22	soc/intel/denverton_ns: Convert to ASL 2.0 syntax	Elyes HAOUAS
2020-11-22	soc/intel/braswell/bootblock/bootblock.c: Report the FSP-T output	Frans Hendriks
2020-11-20	soc/intel/xeon_sp/cpx: Modify PCH_IOAPIC_BUS_NUMBER	Arthur Heymans
2020-11-20	soc/intel/xeon_sp: Set coreboot defined IOAPIC and HPET BDF	Arthur Heymans
2020-11-20	soc/intel/xeon_sp: Use common P2SB functions to generate HPET IOAPIC	Arthur Heymans
2020-11-20	soc/intel/apollolake: use P2SB function to generate DMAR IOAPIC	Arthur Heymans
2020-11-20	soc/intel/common/block/p2sb: Add ioapic BDF functions	Arthur Heymans
2020-11-20	soc/intel/xeon_sp: Use common P2SB functions to generate HPET DMAR	Arthur Heymans
2020-11-20	soc/intel/apollolake: use P2SB function to generate DMAR HPET	Arthur Heymans
2020-11-20	soc/intel/common/block/p2sb: Add hpet BDF functions	Arthur Heymans
2020-11-20	soc/intel/common/p2sb: Add helper function to determine p2sb state	Arthur Heymans
2020-11-20	soc/intel/xeon_sp: Lock down DMICTL	Arthur Heymans
2020-11-20	soc/intel/xeon_sp/cpx: Lock down P2SB SBI	Arthur Heymans
2020-11-20	soc/intel/xeon_sp/{skx,cpx}: Add txt_get_chipset_dpr callback	Arthur Heymans
2020-11-20	soc/intel/denverton_ns: Initialize thermal configuration	Julien Viard de Galbert
2020-11-20	soc/intel/denverton_ns: Enable MC Exception	Julien Viard de Galbert
2020-11-20	src/soc/intel/denverton_ns: Use improvement in coreboot since 4.9	Julien Viard de Galbert
2020-11-20	soc/intel/common: Use per-soc definition for BAR sizes	Duncan Laurie
2020-11-20	soc/intel/common/block/cse: Clear post code before reset	Duncan Laurie
2020-11-20	soc/intel/tigerlake: Enable GPIO IOSTANDBY configuration	Duncan Laurie
2020-11-20	soc/intel/tigerlake: Expose UPD to enable Precision Time Measurement	Duncan Laurie
2020-11-20	soc/intel/tigerlake: Enable RTD3 driver and IPC mailbox	Duncan Laurie
2020-11-20	soc/intel/common: Add PCIe Runtime D3 driver for ACPI	Duncan Laurie
2020-11-20	soc/intel/common/acpi,mb/*: replace the two obsolete LPID with PEPD	Michael Niewöhner
2020-11-20	soc/intel/common/acpi: add _HID to PEPD	Michael Niewöhner
2020-11-20	soc/intel/common/acpi: correct return value for PEPD enum function	Michael Niewöhner
2020-11-20	soc/intel/common/acpi: work around Windows crash on S0ix-enabled boards	Michael Niewöhner
2020-11-20	soc/intel/common/acpi: drop return value for disabled PEPD function 2	Michael Niewöhner
2020-11-20	soc/intel/common/acpi: rename PEPD/LPI macros for clarification	Michael Niewöhner
2020-11-19	soc/intel/common/acpi: rename LPID to PEPD	Michael Niewöhner
2020-11-19	soc/intel/common/acpi: move S0ix UUID to the condition	Michael Niewöhner
2020-11-19	soc/intel/common/acpi: drop the southridge scope around PEPD	Michael Niewöhner
2020-11-18	soc/intel/common: Move CSE RW into new FMAP region to optimize boot time	Sridhar Siricilla
2020-11-18	soc/intel/common: Generate the CSE RW metadata and add to FW_MAIN_A/B	V Sowmya
2020-11-18	soc/intel/common: Add Kconfig to enable the CSE FW Update feature	V Sowmya
2020-11-18	soc/intel/common: Add Kconfig for CSE RW firmware version	V Sowmya
2020-11-17	soc/intel/xeon_sp: Fix SKX SATA drive boot issue	Marc Jones
2020-11-17	src: Add missing 'include <console/console.h>'	Elyes HAOUAS
2020-11-16	src: Update some incorrect config options in comments	Martin Roth
2020-11-16	soc/intel/denverton_ns: Generate ACPI DMAR Table	Julien Viard de Galbert
2020-11-16	soc/intel/xeon_sp: Synchronize DMAR and MADT IOAPIC id's	Arthur Heymans
2020-11-16	soc/intel/broadwell/systemagent.c: Rename to `northbridge.c`	Angel Pons
2020-11-16	lp4x: Add new memory parts and generate SPDs	David Wu
2020-11-14	soc/intel/cnl: enable ACPI CPPC entries generation	Michael Niewöhner
2020-11-14	soc/intel/common/block: add code for ACPI CPPC entries generation	Michael Niewöhner
2020-11-14	soc/intel/xeon_sp: Improve generating PCH IOAPIC MADT entry	Arthur Heymans
2020-11-13	mrc_cache: Move code for triggering memory training into mrc_cache	Shelley Chen