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path: root/src/soc/intel
AgeCommit message (Expand)Author
2019-12-10soc/intel/common: Add Jasperlake Device IDsrkanabar
2019-12-10include/device/pci_ids: Add Coffeelake U IGD P630Christian Walter
2019-12-093rdparts/fsp: Update fsp submoduleJohanna Schander
2019-12-09soc/intel/bsw/gpio: Factor out GPI macrosAngel Pons
2019-12-06soc/intel/skylake: Add option to control microcode update inclusionWim Vervoorn
2019-12-05soc/intel/braswell: Use common sb code for SPI lockdown configurationArthur Heymans
2019-12-03src: Add missing include <stdlib.h>Elyes HAOUAS
2019-12-03soc/intel/cannonlake: Configure GPIO PM configuration in bootblockSubrata Banik
2019-12-03soc/intel/common/cse: Update comment for post-CAR global worldPatrick Georgi
2019-12-02soc/intel/cannonlake: Add gfx.asl fileMathew King
2019-12-02soc/intel: Intel graphics driver scans generic busMathew King
2019-12-02soc/intel/cannonlake: Fix compilationPraveen Hodagatta Pranesh
2019-12-02soc/intel/tigerlake: Change compilation based on TIGERLAKE_BASEMaulik V Vaghela
2019-12-02src/soc/intel: Add Cometlake-S and CMP-H skusGaggery Tsai
2019-12-02src/: Remove g_ prefixes and _g suffixes from variablesPatrick Georgi
2019-11-29{northbridge,soc,southbridge}: Don't use both of _ADR and _HIDElyes HAOUAS
2019-11-29soc/intel/baytrail: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-29soc/intel/braswell: Don't reinitialize SPI after lockdownArthur Heymans
2019-11-29soc/intel/braswell: Use sb/intel/common/spi.cArthur Heymans
2019-11-28soc/intel/tigerlake: select correct chipset based on soc KconfigMaulik V Vaghela
2019-11-28pci_ids: Update Intel Lewisburg SMBUS PCI IDJonathan Zhang
2019-11-28soc/intel/skl: Drop FSP_CAR remnantsNico Huber
2019-11-27soc/intel/skylake: Clean up report_cpu_info() functionUsha P
2019-11-27soc/intel/cannonlake: Disable USB2 PHY Power gatingSurendranath Gurivireddy
2019-11-27soc/intel/tigerlake: Fix smm_relocation_paramsKyösti Mälkki
2019-11-27soc/intel/baytrail: Don't reinitialize SPI after lockdownArthur Heymans
2019-11-27soc/intel/baytrail: Use sb/intel/common/spi.cArthur Heymans
2019-11-27soc/skylake: Write the P2SB IBDF and HBDF registers in corebootAngel Pons
2019-11-26soc/intel/{apl,cnl,dnv,skl}: Skip ucode loading by FSP-TSubrata Banik
2019-11-26soc/intel/cannonlake: Add chip config to override CPU flex ratioSubrata Banik
2019-11-26sb/intel/common/spi: Add Baytrail/Braswell supportArthur Heymans
2019-11-25soc/intel/tigerlake: Add Jasperlake soc KconfigMaulik V Vaghela
2019-11-25Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbolArthur Heymans
2019-11-25soc/intel/broadwell: Fix 'dead increment'Elyes HAOUAS
2019-11-22soc/intel/icelake: Make CpuMpPpi implementation default for ICLSubrata Banik
2019-11-22soc/intel/common/intelblocks: Define PAD_CFG0_MODE_NF7Nick Vaccaro
2019-11-22intel/smm: Provide common smm_relocation_paramsKyösti Mälkki
2019-11-22soc/intel/skylake: Refactor pch_early_init() codeUsha P
2019-11-21Kconfig: Remove not found sourcesElyes HAOUAS
2019-11-21soc/intel/fsp_broadwell_de: Drop supportArthur Heymans
2019-11-21soc/intel/fsp_baytrail: Drop supportArthur Heymans
2019-11-20soc/intel/skylake: lockdown: lock global resetMichael Niewöhner
2019-11-20soc/intel/icelake: lockdown: lock global resetMichael Niewöhner
2019-11-20soc/intel/cannonlake: lockdown: lock global resetMichael Niewöhner
2019-11-20soc/intel/common: pmclib: make use of the new ETR address APIMichael Niewöhner
2019-11-20soc/intel/skylake: add soc implementation for ETR address APIMichael Niewöhner
2019-11-20cbfs: switch to region_device for location APIsAaron Durbin
2019-11-18include: Make stdbool.h a separate fileJulius Werner
2019-11-18*/Makefile: Always build enable_usbdebug.cArthur Heymans
2019-11-16intel/skylake: Use new PCIe RP devicetree updateNico Huber