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path: root/src/soc/intel
AgeCommit message (Expand)Author
2020-04-06soc/intel/icelake: Use SPDX for GPL-2.0-only filesAngel Pons
2020-04-06soc/intel/denverton_ns: Use SPDX for GPL-2.0-only filesAngel Pons
2020-04-06soc/intel/cannonlake: Use SPDX for GPL-2.0-only filesAngel Pons
2020-04-06soc/intel/broadwell: Use SPDX for GPL-2.0-only filesAngel Pons
2020-04-06soc/intel/baytrail: Use SPDX for GPL-2.0-only filesAngel Pons
2020-04-06soc/intel/common: Use SPDX for GPL-2.0-only filesAngel Pons
2020-04-06soc/intel/braswell: Use SPDX for GPL-2.0-only filesAngel Pons
2020-04-06soc/intel/skylake: Use SPDX for GPL-2.0-only filesAngel Pons
2020-04-06soc/intel/xeon_sp: Use SPDX for GPL-2.0-only filesAngel Pons
2020-04-06soc/intel/apollolake: Use SPDX for GPL-2.0-only filesAngel Pons
2020-04-06soc/intel/common: Remove unused Kconfig SKIP_GRAPHICS_ENABLINGRonak Kanabar
2020-04-06soc/intel/jasperlake: Remove DDI A lane programmingRonak Kanabar
2020-04-05fsp2_0: Gather Kconfig declarationsNico Huber
2020-04-05soc/intel/apollolake: Don't select repo option for Gemini LakeNico Huber
2020-04-05soc/intel/tigerlake: Replace Reserved9 usage with DisableDimmCh# UPD.Srinidhi N Kaushik
2020-04-05Drop explicit NULL initializations from `device_operations`Elyes HAOUAS
2020-04-04soc/intel/xeon_sp/cpx: Add multi-core initAndrey Petrov
2020-04-03soc/intel/skylake: vr_config: enable PSI3 and PSI4 by defaultMichael Niewöhner
2020-04-02soc/intel/braswell: add ACPI backlight supportMatt DeVillier
2020-04-02soc/intel/baytrail: add ACPI backlight supportMatt DeVillier
2020-04-02soc/intel/broadwell: add ACPI backlight supportMatt DeVillier
2020-04-02Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`Nico Huber
2020-04-02soc/intel/tigerlake: Add macros and SPD information for DDR4Furquan Shaikh
2020-04-02soc/intel/tigerlake: Reorganize memory initialization supportFurquan Shaikh
2020-04-01soc/intel/tigerlake: Remove Jasper Lake SoC referencesAamir Bohra
2020-04-01soc/intel/{tgl,jsl}: Use soc/intel/jasperlake for Jasper Lake SoCAamir Bohra
2020-03-31soc/intel/common/block: Add missing includeRizwan Qureshi
2020-03-31security/vboot: relocate and rename vboot_platform_is_resuming()Bill XIE
2020-03-31soc/intel/common/block/cse: Add check for CSE enabledWim Vervoorn
2020-03-30intel/fsp2_0: Make FSP_USE_REPO a SoC opt-inJohanna Schander
2020-03-30soc/intel/{icelake, tigerlake}: Remove DDI A lane programmingRonak Kanabar
2020-03-30soc/intel/tigerlake: Configure IOM_TYPEC_SW_CONFIGURATION_3Brandon Breitenstein
2020-03-28soc/intel/skylake: Hook up GMA ACPI brightness controlsMatt DeVillier
2020-03-28soc/intel/common: Hook up GMA ACPI brightness controlsMatt DeVillier
2020-03-28soc/intel/jasperlake: Remove Tiger Lake SoC code from Jasper LakeAamir Bohra
2020-03-28soc/intel/jasperlake: Add Jasper Lake SoC supportAamir Bohra
2020-03-26soc/intel/xeon_sp: Add basic Cooperlake-SP supportAndrey Petrov
2020-03-26soc/intel/xeon_sp: Configure P2SB BAR in bootblockAndrey Petrov
2020-03-26soc/intel/xeon_sp: Refactor code to allow for additional CPUs typesAndrey Petrov
2020-03-25create stdio.h and stdarg.h for {,v}snprintfJoel Kitching
2020-03-25soc/intel/cometlake: Use IntelFSP repoFelix Singer
2020-03-25soc/intel/xeon_sp: Enable LPC generic IO decode rangeJohnny Lin
2020-03-25soc/intel/tigerlake: Configure HyperthreadingWonkyu Kim
2020-03-24intel/broadwell: Correct backlight-PWM dividerNico Huber
2020-03-23soc/intel/tigerlake: Update DCACHE_BSP_STACK_SIZETim Wawrzynczak
2020-03-23acpi: Change Processor ACPI Name (Intel only)Christian Walter
2020-03-23soc/intel/braswell: Clean upAngel Pons
2020-03-23soc/intel/cfl/vr_config: Add 8-core desktop CPU supportPatrick Rudolph
2020-03-23src: capitalize 'APIC'Elyes HAOUAS
2020-03-21soc/intel/tigerlake: Make PCH_DEV_UART3 macro definition properSubrata Banik