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coreboot
2560p
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autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
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mec1322
Some coreboot project code with my work
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Age
Commit message (
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Author
2015-07-29
skylake: clean-up pei_data
robbie zhang
2015-07-29
skylake: align power management names with hardware
Aaron Durbin
2015-07-29
skylake: provide pcr helper to get a port's register space
Aaron Durbin
2015-07-29
skylake: prefix the gpio functions with 'gpio_'
Aaron Durbin
2015-07-29
skylake: remove unused types and definitions in gpio.h
Aaron Durbin
2015-07-29
intel/braswell: fix build
Jenny TC
2015-07-29
BCRD2: Enable PMIC SVID config
Jenny TC
2015-07-29
skylake: remove the redundant fspNotify in chip final.
robbie zhang
2015-07-29
skylake: Rework microcode include path
Duncan Laurie
2015-07-24
skylake: Fix building without serial console
Duncan Laurie
2015-07-23
intel: common: Let mainboard supplement FSP memory info
Duncan Laurie
2015-07-23
intel/common: Add SMBIOS memory width
Lee Leahy
2015-07-23
skylake: sanitize pcr header for ACPI and assembler
Aaron Durbin
2015-07-23
skylake: provide more clarity for PCR access
Aaron Durbin
2015-07-21
intel/fsp_baytrail: Support Baytrail FSP Gold4 release
York Yang
2015-07-21
skylake: add global reset cause registers to power state
Aaron Durbin
2015-07-21
skylake: take into account deep s3 in power failure check
Aaron Durbin
2015-07-21
skylake: read out and report full width of gen_pmcon registers
Aaron Durbin
2015-07-21
Glados: Update Serial IO modes in devicetree
Naveen Krishna Chatradhi
2015-07-21
intel/skylake: support 32bit uart8250_mem driver in romstage
Naveen Krishna Chatradhi
2015-07-21
intel/common: remove printk in pre_console_init()
rsatapat
2015-07-21
Skylake: Initialize GPIOs for UART2
rsatapat
2015-07-21
Skylake: Only support UART2 as debug port, clean up the rest
Naveen Krishna Chatradhi
2015-07-21
intel fsp: remove CHIPSET_RESERVED_MEM_BYTES
Aaron Durbin
2015-07-21
Braswell: Remove GOP from normal boot mode.
Abhay Kumar
2015-07-21
skylake: re-enable PCIe L1 sub states
Aaron Durbin
2015-07-21
skylake: honor pcie root port settings already in chip.h
Aaron Durbin
2015-07-21
skylake: Show SPI controller if enabled in devicetree.cb
Duncan Laurie
2015-07-21
braswell: clean up \_PR entries
Jagadish Krishnamoorthy
2015-07-17
soc/intel: Remove microcode terminators
Stefan Reinauer
2015-07-17
skylake: remove whitespace from ASL files
Stefan Reinauer
2015-07-16
soc/intel: Add Skylake SOC support
Lee Leahy
2015-07-16
soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC
Lee Leahy
2015-07-14
Braswell: Use CBFS image type name
Lee Leahy
2015-07-14
azalia: fix up and clean up shrinkage of boilerplate code
Jonathan A. Kollasch
2015-07-10
Braswell: Move the microcode into a subdirectory
Lee Leahy
2015-07-08
Braswell: Fix error in the warranty statement
Lee Leahy
2015-07-07
x86: Drop -Wa,--divide
Stefan Reinauer
2015-07-06
Braswell: Update to end of June.
Lee Leahy
2015-07-06
Braswell: Update the ACPI tables
Lee Leahy
2015-07-04
Kconfig: Fix references to obsolete symbols
Martin Roth
2015-07-02
Move baytrail & fsp_baytrail to the common IFD interface.
Martin Roth
2015-06-26
soc/intel/common: Restrict common romstage/ramstage code to FSP
Lee Leahy
2015-06-25
Braswell: Remove copyright address
Lee Leahy
2015-06-25
Braswell: Add Braswell SOC support
Lee Leahy
2015-06-25
soc/intel/common/Kconfig: Fix warning & whitespace
Martin Roth
2015-06-24
Intel/common: Remove copyright address
Lee Leahy
2015-06-24
Intel Common SOC: Add romstage support
Lee Leahy
2015-06-24
Kconfig: Get rid of obsolete symbols
Martin Roth
2015-06-23
Kconfig: Move CBFS_SIZE into Mainboard menu
Martin Roth
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