coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2016-01-28	Braswell: Separate L1 Sub State init procedure for boards.	Kenji Chen
2016-01-28	Strago: Enable CA Mirror	Shobhit Srivastava
2016-01-28	soc/braswell: Disable SD card detect simulation in FSP	Divya Sasidharan
2016-01-28	soc/braswell: Set max frequency to be turbo frequency	Hannah Williams
2016-01-28	soc/braswell: Fix DSP clock	fdurairx
2016-01-28	drivers/intel/fsp1_1: Remove extra include references	Lee Leahy
2016-01-27	soc/braswell: Fix leakage on V1P8S rail	Shobhit Srivastava
2016-01-27	soc/braswell: Add macro NATIVE_INT_PU20K	Hannah Williams
2016-01-26	Braswell: Implement Gpio library functions to read RAMID	Subrata Banik
2016-01-22	soc/braswell: Add method for Wifi regulatory domain	Felix Durairaj
2016-01-22	intel/skylake: Fix klockwork violation	Naresh G Solanki
2016-01-22	intel/skylake: Thermal Design Power PL1 and PL2 Config Changes	pchandri
2016-01-21	intel/skylake: remove third paragraph of license header	Martin Roth
2016-01-21	broadwell: gpio.asl: Make GWAK method serialized	Duncan Laurie
2016-01-19	Braswell: add code to support customization of I2C data hold time	Kane Chen
2016-01-19	intel/skylake: Fix issues found by klockwork	Naresh G Solanki
2016-01-19	intel/skylake: Adding provision to set voltages to the I2C ports	Naresh G Solanki
2016-01-19	intel/skylake: Disable SaGv in recovery mode	haridhar
2016-01-19	soc/braswell: Remove the unneccessary functions from pcie.c	Shaunak Saha
2016-01-19	intel/skylake: Add support for IV feedback loop capture blob	Sathya Prakash M R
2016-01-18	intel/skylake: Change in UPD name from SkipMpInit to FspSkipMpInit	Barnali Sarkar
2016-01-18	intel/skylake: Remove unused devicetree configuration variables	Duncan Laurie
2016-01-18	intel/skylake: provide default VR configuration	Aaron Durbin
2016-01-18	intel/skylake: Add devicetree setting for DDR frequency limit UPD	Duncan Laurie
2016-01-18	intel/skylake: Add elog event for THERMTRIP	Duncan Laurie
2016-01-17	intel/skylake: disable heci1 if psf is unlocked	Archana Patni
2016-01-17	intel/skylake: During RO mode after FSP reset CB lose original state	Subrata Banik
2016-01-16	intel/skylake: Fix uninitialized variable warning	Martin Roth
2016-01-16	intel/skylake: Add kconfig option to skip Native SD Controller	Subrata Banik
2016-01-16	intel/skylake: Add VrConfig UPD parameters from coreboot	Rizwan Qureshi
2016-01-16	intel/skylake: Enable SkipMpInit token	Rizwan Qureshi
2016-01-15	intel/skylake: Init variable so GCC knows it's set	Martin Roth
2016-01-15	intel/skylake: More UPD params are added for PCH policy in FSP	Rizwan Qureshi
2016-01-15	intel/skylake: Update UPD parameters as per FSP 1.8.0	Barnali Sarkar
2016-01-15	intel/skylake: Add GPIO ACPI Apis.	Subrata Banik
2016-01-15	intel/skylake: add nhlt support	Aaron Durbin
2016-01-14	soc/braswell: Add CPUID for D0 stepping	Divya Sasidharan
2016-01-14	soc/braswell: Fix P-state table	Subrata Banik
2016-01-14	intel/skylake/pcr.c: error out on invalid size in pcr read/write	Martin Roth
2016-01-13	tree: drop last paragraph of GPL copyright header from new files	Martin Roth
2016-01-12	intel/skylake: Remove check for Microcode loaded by ME	Martin Roth
2016-01-08	fsp_baytrail: Add additional PCI space above 4GB	Martin Roth
2016-01-07	intel/braswell: Disable IFD & ME by default so abuild can build	Martin Roth
2016-01-07	Correct some common spelling mistakes	Martin Roth
2016-01-06	intel/braswell: Build in both C0 and 'other' vbios	Martin Roth
2015-12-27	soc/intel/broadwell: Add back support for EHCI debug setup	Duncan Laurie
2015-12-27	broadwell: Fix SATA Gen3 DTLE configuration registers	Duncan Laurie
2015-12-27	broadwell: Fix CONFIG_SPI_CONSOLE usage	Duncan Laurie
2015-12-26	ACPI: Add hack to avoid IASL warning when reading back registers	Martin Roth
2015-12-22	soc/intel/fsp_baytrail: Make sure i2c bus is < 7	Martin Roth