coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-04-06	soc/intel/baytrail: Use SPDX for GPL-2.0-only files	Angel Pons
2020-04-06	soc/intel/common: Use SPDX for GPL-2.0-only files	Angel Pons
2020-04-06	soc/intel/braswell: Use SPDX for GPL-2.0-only files	Angel Pons
2020-04-06	soc/intel/skylake: Use SPDX for GPL-2.0-only files	Angel Pons
2020-04-06	soc/intel/xeon_sp: Use SPDX for GPL-2.0-only files	Angel Pons
2020-04-06	soc/intel/apollolake: Use SPDX for GPL-2.0-only files	Angel Pons
2020-04-06	soc/intel/common: Remove unused Kconfig SKIP_GRAPHICS_ENABLING	Ronak Kanabar
2020-04-06	soc/intel/jasperlake: Remove DDI A lane programming	Ronak Kanabar
2020-04-05	fsp2_0: Gather Kconfig declarations	Nico Huber
2020-04-05	soc/intel/apollolake: Don't select repo option for Gemini Lake	Nico Huber
2020-04-05	soc/intel/tigerlake: Replace Reserved9 usage with DisableDimmCh# UPD.	Srinidhi N Kaushik
2020-04-05	Drop explicit NULL initializations from `device_operations`	Elyes HAOUAS
2020-04-04	soc/intel/xeon_sp/cpx: Add multi-core init	Andrey Petrov
2020-04-03	soc/intel/skylake: vr_config: enable PSI3 and PSI4 by default	Michael Niewöhner
2020-04-02	soc/intel/braswell: add ACPI backlight support	Matt DeVillier
2020-04-02	soc/intel/baytrail: add ACPI backlight support	Matt DeVillier
2020-04-02	soc/intel/broadwell: add ACPI backlight support	Matt DeVillier
2020-04-02	Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`	Nico Huber
2020-04-02	soc/intel/tigerlake: Add macros and SPD information for DDR4	Furquan Shaikh
2020-04-02	soc/intel/tigerlake: Reorganize memory initialization support	Furquan Shaikh
2020-04-01	soc/intel/tigerlake: Remove Jasper Lake SoC references	Aamir Bohra
2020-04-01	soc/intel/{tgl,jsl}: Use soc/intel/jasperlake for Jasper Lake SoC	Aamir Bohra
2020-03-31	soc/intel/common/block: Add missing include	Rizwan Qureshi
2020-03-31	security/vboot: relocate and rename vboot_platform_is_resuming()	Bill XIE
2020-03-31	soc/intel/common/block/cse: Add check for CSE enabled	Wim Vervoorn
2020-03-30	intel/fsp2_0: Make FSP_USE_REPO a SoC opt-in	Johanna Schander
2020-03-30	soc/intel/{icelake, tigerlake}: Remove DDI A lane programming	Ronak Kanabar
2020-03-30	soc/intel/tigerlake: Configure IOM_TYPEC_SW_CONFIGURATION_3	Brandon Breitenstein
2020-03-28	soc/intel/skylake: Hook up GMA ACPI brightness controls	Matt DeVillier
2020-03-28	soc/intel/common: Hook up GMA ACPI brightness controls	Matt DeVillier
2020-03-28	soc/intel/jasperlake: Remove Tiger Lake SoC code from Jasper Lake	Aamir Bohra
2020-03-28	soc/intel/jasperlake: Add Jasper Lake SoC support	Aamir Bohra
2020-03-26	soc/intel/xeon_sp: Add basic Cooperlake-SP support	Andrey Petrov
2020-03-26	soc/intel/xeon_sp: Configure P2SB BAR in bootblock	Andrey Petrov
2020-03-26	soc/intel/xeon_sp: Refactor code to allow for additional CPUs types	Andrey Petrov
2020-03-25	create stdio.h and stdarg.h for {,v}snprintf	Joel Kitching
2020-03-25	soc/intel/cometlake: Use IntelFSP repo	Felix Singer
2020-03-25	soc/intel/xeon_sp: Enable LPC generic IO decode range	Johnny Lin
2020-03-25	soc/intel/tigerlake: Configure Hyperthreading	Wonkyu Kim
2020-03-24	intel/broadwell: Correct backlight-PWM divider	Nico Huber
2020-03-23	soc/intel/tigerlake: Update DCACHE_BSP_STACK_SIZE	Tim Wawrzynczak
2020-03-23	acpi: Change Processor ACPI Name (Intel only)	Christian Walter
2020-03-23	soc/intel/braswell: Clean up	Angel Pons
2020-03-23	soc/intel/cfl/vr_config: Add 8-core desktop CPU support	Patrick Rudolph
2020-03-23	src: capitalize 'APIC'	Elyes HAOUAS
2020-03-21	soc/intel/tigerlake: Make PCH_DEV_UART3 macro definition proper	Subrata Banik
2020-03-20	soc/intel: Enable GPIO functions in verstage	Bora Guvendik
2020-03-20	soc/intel/denverton_ns: Implement AES-NI Lock	Julien Viard de Galbert
2020-03-20	soc/intel/tigerlake: Enable ACPI support for PMC core OS driver	Venkata Krishna Nimmagadda
2020-03-20	soc/intel/common: Add ACPI support for PMC core OS driver	Venkata Krishna Nimmagadda