summaryrefslogtreecommitdiff
path: root/src/soc/intel
AgeCommit message (Expand)Author
2019-08-03intel/baytrail,broadwell: Move stage cache support functionKyösti Mälkki
2019-08-02soc/intel/cannonlake: Enable ACPI timer emulation if PM timer is disabledAamir Bohra
2019-08-02soc/intel/cannonlake: Disable ACPI PM timer to reduce S0ix power usageSubrata Banik
2019-08-02soc/intel/common/pch: Move thermal kconfig selection into common/pchSubrata Banik
2019-08-02soc/intel/icelake: Make use of common thermal code for ICLSubrata Banik
2019-08-02soc/intel/skylake: Make use of common thermal code for SKLSubrata Banik
2019-08-01soc/intel/cannonlake/bootblock: Clear the GPI IS & IE registersDavid Wu
2019-07-31soc/intel/skl: Add C232 chipset and reorder IDsFelix Singer
2019-07-31soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlakeAamir Bohra
2019-07-31soc/intel/common/block/lpss: Correct the PCI device referenceAamir Bohra
2019-07-31soc/intel/cannonlake: Enable PCH Thermal Sensor configuration for S0ixSumeet Pawnikar
2019-07-31soc/intel/common/block: Enable PCH Thermal Sensor for threshold configurationSumeet Pawnikar
2019-07-30soc/intel/cnl: Only print ME status one timeTim Wawrzynczak
2019-07-30soc/intel/cannonlake: Allow coreboot to handle required chipset lockdownSubrata Banik
2019-07-30soc/intel/cannonlake: Add new PCI IDsFelix Singer
2019-07-30soc/intel/{broad,cannon,sky}: Fix possible out-of-bounds readsJacob Garber
2019-07-29Revert "soc/intel/common: Set controller state to active in uart init"Christian Walter
2019-07-29soc/intel/baytrail: Prevent unintended sign extensionsJacob Garber
2019-07-29soc/intel/cannonlake: Correct the data type of serial_io_devAamir Bohra
2019-07-26soc/intel/baytrail/Makefile.inc: Sort entriesAngel Pons
2019-07-25soc/intel/fsp_broadwell_de: Fix use of config_of()Kyösti Mälkki
2019-07-25soc/intel: Guard remaining SA_DEV_ROOT definitionKyösti Mälkki
2019-07-25soc/intel/broadwell: Fix case of SA_DEV_ROOTKyösti Mälkki
2019-07-25soc/intel/cannonlake: Split the "internal PME" wake-up into more detailPaul Fagerburg
2019-07-25soc/intel/icelake: Add ENABLE_DISPLAY_OVER_EXT_PCIE_GFX kconfigSubrata Banik
2019-07-24soc/intel/common: Set controller state to active in GSPI initMeera Ravindranath
2019-07-24soc/intel/common: Set controller state to active in uart initUsha P
2019-07-22soc/intel/broadwell: Change variable back to u32Jacob Garber
2019-07-21soc/intel: Expand SA_DEV_ROOT for ramstageKyösti Mälkki
2019-07-21soc/intel: Change file to __SIMPLE_DEVICE__Kyösti Mälkki
2019-07-21soc/intel: Fix chip_info for PCH_DEV_PMCKyösti Mälkki
2019-07-21soc/intel/common: gpio_defs: set trig to disable in PAD_CFG_GPO*Maxim Polyakov
2019-07-21soc/intel/common: add PAD_CFG_NF_BUF_TRIG macroMaxim Polyakov
2019-07-21soc/intel/skylake: Enable Energy/Performance Bias controlMatthew Garrett
2019-07-19soc/intel/common/block/xhci: Add API to disable USB devicesKarthikeyan Ramasubramanian
2019-07-19soc/intel/common: Add SOC specific function to get XHCI USB infoKarthikeyan Ramasubramanian
2019-07-18soc/intel: Use config_of()Kyösti Mälkki
2019-07-18soc/intel: Fix invalid use of 'static'Kyösti Mälkki
2019-07-18soc/intel: Use config_of_path(SA_DEVFN_ROOT)Kyösti Mälkki
2019-07-17soc/intel/cannonlake: Add device Ids for new CFL SKUs supportLean Sheng Tan
2019-07-17soc/intel: Fix regression with hidden PCI devicesKyösti Mälkki
2019-07-17intel/fsp_baytrail: Avoid preprocessor with HAVE_SMI_HANDLERKyösti Mälkki
2019-07-16soc/intel/{cnl,icl}: Always use CAR NEM enhanced by defaultAngel Pons
2019-07-16soc/intel/common/block/i2c: Set controller state to active in i2c initAamir Bohra
2019-07-16soc/intel/common/block/lpss: Add provision to set controller power stateAamir Bohra
2019-07-15intel/cannonlake: Fix indentationKyösti Mälkki
2019-07-15src: Use '#include <timestamp.h>' when neededElyes HAOUAS
2019-07-14soc/intel/icelake: Update FSP UPDs if IGD is disable in devicetreeSubrata Banik
2019-07-14soc/intel/icelake: Make use of PCH_DEVFN_HDA macroSubrata Banik
2019-07-13soc/intel/cannonlake: Remove unused header files from southbridge.aslAamir Bohra