| Age | Commit message (Expand) | Author |
|---|
| 2020-01-09 | soc/intel/{cnl,icl,tgl}: Move northbridge.asl into common/block/acpi | Subrata Banik |
| 2020-01-08 | soc/intel/tigerlake: Fix PMC config | Ravi Sarawadi |
| 2020-01-08 | soc/intel/cannonlake: Add VR config for CML | Jamie Chen |
| 2020-01-08 | soc/intel/cannonlake: Add Comet Lake H SA 4+2 Device ID | Jamie Chen |
| 2020-01-07 | soc/intel/{apl,cnl,icl,skl,tgl}: Clean up SA ASL code | Subrata Banik |
| 2020-01-06 | soc/intel/cannonlake: Add VR config for CFL, CNL and WHL | Patrick Rudolph |
| 2020-01-06 | soc/intel/dnv: Remove commented out Kconfig option | Subrata Banik |
| 2020-01-03 | device/early_smbus: Drop unused function parameter | Kyösti Mälkki |
| 2020-01-03 | soc/intel/common: Split some SMBUS support file | Kyösti Mälkki |
| 2020-01-03 | intel/braswell: Drop use of <device/early_smbus.h> | Kyösti Mälkki |
| 2020-01-02 | soc/intel/bsw/gpio.h: Drop unused values | Angel Pons |
| 2020-01-02 | src: Remove unneeded 'include <arch/io.h>' | Elyes HAOUAS |
| 2019-12-31 | soc/intel/{icl,cnl,tgl}: Always add PM1_TMR block to FADT | Meera Ravindranath |
| 2019-12-27 | arch/x86: Remove <arch/cbfs.h> | Kyösti Mälkki |
| 2019-12-26 | soc/broadwell/minihd: correct vendor, subsystem IDs | Matt DeVillier |
| 2019-12-26 | soc/intel/cannonlake: Move GPIO PM configuration to soc level | Eric Lai |
| 2019-12-26 | src: Remove unused include <string.h> | Elyes HAOUAS |
| 2019-12-26 | soc/intel/cannonlake: Clean up report_cpu_info() function | Usha P |
| 2019-12-26 | soc/intel/cannonlake: Refactor pch_early_init() code | Usha P |
| 2019-12-26 | soc/intel/skylake: Rename pch_init() code | Usha P |
| 2019-12-25 | soc/intel/skylake/vr_config: Use lookup table by default | Patrick Rudolph |
| 2019-12-20 | soc/intel/tigerlake: Update FSP stack and heap size | Maulik V Vaghela |
| 2019-12-20 | {drivers,soc}/intel/fsp1_1: Move chipset specific logo handling to SoC | Wim Vervoorn |
| 2019-12-20 | {nb,soc}: Replace min/max() with MIN/MAX() | Elyes HAOUAS |
| 2019-12-19 | arch/x86,soc/intel: Drop RESET_ON_INVALID_RAMSTAGE_CACHE | Kyösti Mälkki |
| 2019-12-19 | {drivers,soc}/intel/fsp2_0: Move chipset specific logo handling to SoC | Wim Vervoorn |
| 2019-12-19 | soc/intel/tigerlake: Add required header files in pch.c | Aamir Bohra |
| 2019-12-19 | src: Remove unused 'include <arch/cpu.h>' | Elyes HAOUAS |
| 2019-12-19 | src/soc/intel: Remove unused <stdlib.h> | Elyes HAOUAS |
| 2019-12-19 | src: Use '#include <smp/node.h>' when appropriate | Elyes HAOUAS |
| 2019-12-19 | src: Remove unused include <device/smbus_def.h> | Elyes HAOUAS |
| 2019-12-18 | src: Remove unused 'include <bootblock_common.h>' | Elyes HAOUAS |
| 2019-12-17 | soc/intel/skylake: Change SA_PCIEX_LENGTH to 256MB | Wim Vervoorn |
| 2019-12-17 | soc/intel/skylake: Add irq 11 to the LNK* _PRS | Wim Vervoorn |
| 2019-12-17 | soc/intel/apollolake: add support for extracting LBP2 from IFWI | Jeremy Compostella |
| 2019-12-17 | soc/intel{cannonlake,icelake}/northbridge.asl: Correct flash range | Wim Vervoorn |
| 2019-12-17 | src: Conditionally include TEVT | Frans Hendriks |
| 2019-12-16 | src/soc/intel/cannonlake: Bump MAX_CPU from 8->12 | Edward O'Callaghan |
| 2019-12-16 | soc/intel/tigerlake: Add FSP header and Fsp.fd file path for Jasper Lake | Aamir Bohra |
| 2019-12-16 | 3rdparty/fsp: Update to current master again | Nico Huber |
| 2019-12-16 | soc/intel/common/block/chip/Kconfig: Fix minor whitespace | Himanshu Sahdev aka CunningLearner |
| 2019-12-16 | soc/intel/tigerlake: Pick correct pmc base reg from pch type | Maulik V Vaghela |
| 2019-12-14 | Revert "{northbridge,soc,southbridge}: Don't use both of _ADR and _HID" | Nico Huber |
| 2019-12-14 | bootblock: Provide some common prototypes | Kyösti Mälkki |
| 2019-12-13 | soc/intel/common: Add PCI device IDs for CMP-H | Gaggery Tsai |
| 2019-12-12 | soc/intel/{cnl,icl,skl,tgl}: Remove unused gpe0_en_* from chip.h | Furquan Shaikh |
| 2019-12-11 | printf: Automatically prefix %p with 0x | Julius Werner |
| 2019-12-11 | soc/intel/tigerlake: Include soc common lpss header file | Aamir Bohra |
| 2019-12-11 | soc/intel/tigerlake: add soc implementation for ETR address API | Aamir Bohra |
| 2019-12-11 | soc/intel/Kconfig: Load Tiger Lake SOC Kconfig | Aamir Bohra |
