coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2015-04-13	broadwell: Fix incorrect SATA port map mask	Wenkai Du
2015-04-13	broadwell: Enable double self refresh by default	Duncan Laurie
2015-04-10	baytrail: correct NC pin to GPO pin according to BYT platform design guide	Kane Chen
2015-04-10	broadwell: Correct XHCI offset for USB 3.0 ports	Julius Werner
2015-04-10	broadwell: Set PCIe replay timeout to 0xD	Duncan Laurie
2015-04-10	baytrail: add code for supporting 2x ddr refresh rate	Kane Chen
2015-04-10	broadwell: Add configuration for tuning VR for C-state operations	Duncan Laurie
2015-04-10	broadwell: Preserve VbNv around cmos_init	Duncan Laurie
2015-04-10	broadwell: Add function to apply PRR to a range of SPI flash	Duncan Laurie
2015-04-10	broadwell: Turn off panel backlight in S5 SMI handler	Duncan Laurie
2015-04-10	broadwell: Skip steps when disabling PCIe port	Duncan Laurie
2015-04-10	broadwell: Remove XHCI workarounds on WPT	Duncan Laurie
2015-04-10	broadwell: Only do pre-graphics delay when running option rom	Duncan Laurie
2015-04-10	broadwell: Fix PCIe ports programming sequences to enable HSIOPC	Wenkai Du
2015-04-10	broadwell: Update SATA Gen3 TX adjustment registers	Duncan Laurie
2015-04-10	broadwell: Add a few bits to finalize step	Duncan Laurie
2015-04-10	baytrail: fix the coding error on PCIe L1 exit latency	Kevin L Lee
2015-04-10	Baytrail: Prior to PCI scan, wait for LCTL to be active in 50 ms	Kevin Hsieh
2015-04-10	Broadwell: Set boot_mode of pei_data before running reference code	Kenji Chen
2015-04-10	broadwell: Increase I2C SDA hold timing to 300ns	Chiranjeevi Rapolu
2015-04-10	broadwell: add RCBA posting read after writing	Wenkai Du
2015-04-10	Broadwell: Synchronization with FRC for Root Port Power Management	Kenji Chen
2015-04-10	broadwell: Skip DDI-A enable in S3 resume	Duncan Laurie
2015-04-10	broadwell: Add support for ACPI \_GPE._SWS	Duncan Laurie
2015-04-10	baytrail: Switch from ACPI mode to PCI mode for legacy support	Marc Jones
2015-04-08	console: fix Kconfig uses	Patrick Georgi
2015-04-07	broadwell: Change all SoC headers to <soc/headername.h> system	Julius Werner
2015-04-07	baytrail: Change all SoC headers to <soc/headername.h> system	Julius Werner
2015-04-07	kconfig: drop intermittend forwarder files	Stefan Reinauer
2015-04-06	baytrail: Fix hdmi audio choppy issue	Kein Yuan
2015-04-06	baytrail: reinitialize spi controller in SMM finalization	Aaron Durbin
2015-04-04	build system: rename __BOOT_BLOCK__ and __VER_STAGE__	Patrick Georgi
2015-04-04	broadwell: Enable turbo ratio if available	Duncan Laurie
2015-04-04	Broadwell: Pass TSC value to romstage_main	Lee Leahy
2015-04-04	broadwell: fix typo in pei_data	Duncan Laurie
2015-04-04	broadwell: Add USB3 PHY tuning fields to PEI DATA	Duncan Laurie
2015-04-04	Baytrail: Fix no_dev_behind_port not executed for RP1/2/3.	Kenji Chen
2015-04-04	Broadwell: Fix PCIe L1 Sub-State capability ID not filled.	Kenji Chen
2015-04-04	broadwell: Fix building with USE=quiet-cb	Duncan Laurie
2015-04-03	rmodule: use struct prog while loading rmodules	Aaron Durbin
2015-04-02	Broadwell: Select PCIE_L1_SUB_STATE and apply Broadwell settings.	Kenji Chen
2015-04-02	broadwell: Disable ADSP power gating feature by default	Duncan Laurie
2015-04-02	broadwell: Add event log entry for GPIO27	Duncan Laurie
2015-04-02	Broadwell: Reg_Script: add END tag to array "smbus_init_script"	Ryan Lin
2015-04-02	Broadwell: Synchronize for power management with FRC	Kenji Chen
2015-04-02	Broadwell: Synchronize RO, Link Arbiter, and OBFF with FRC	Kenji Chen
2015-04-02	Broadwell: Revise programming flow for write-once registers	Kenji Chen
2015-04-02	broadwell: Configure IOSF Port and Grant Count	Kenji Chen
2015-04-02	Samus: Synchronization with FRC to enable PCIe Relaxed Order.	Kenji Chen
2015-04-02	baytrail: Change USB3 PLL VCO and iCLK PLL current on BYT-M/D CPU	Kein Yuan