coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2019-09-15	soc/intel/skylake: add some FSP SATA params	Michael Niewöhner
2019-09-15	src/soc: Remove unused include <device/pci_ops.h>	Elyes HAOUAS
2019-09-13	intel/broadwell: Replace some __PRE_RAM__ use	Kyösti Mälkki
2019-09-13	soc/intel: Remove some __PRE_RAM__ use	Kyösti Mälkki
2019-09-13	drivers/elog: Add elog_boot_notify()	Kyösti Mälkki
2019-09-13	soc/intel/cannonlake: Allow coreboot to reserve stack for fsp	Bora Guvendik
2019-09-12	soc/intel/cnl: Remove unnecessary FSP UPD “PchPwrOptEnable” usage	Subrata Banik
2019-09-12	src/{northbridge,soc}: Remove not used #include <elog.h>	Elyes HAOUAS
2019-09-12	src/soc/intel/common/block/cse: Make hfsts1 common & add helper functions	Sridhar Siricilla
2019-09-12	soc/intel/cannonlake: Add config for sata devslp pad reset configuration	Aamir Bohra
2019-09-12	soc/intel/{cnl, icl}: Cache the TSEG region	Subrata Banik
2019-09-12	soc/{amd, intel}: Make use of common postcar_enable_tseg_cache() API	Subrata Banik
2019-09-11	intel/fsp2_0: Add help text for FSP_TEMP_RAM_SIZE Kconfig	Subrata Banik
2019-09-11	soc/intel/common/block/cse: Move me_read_config32() to common code	Sridhar Siricilla
2019-09-11	arch/x86: Restrict use of _car_global[start\|end]	Kyösti Mälkki
2019-09-11	arch/x86: Drop _car_relocatable_data symbols	Kyösti Mälkki
2019-09-10	soc/intel/skylake: Add option to toggle Hyper-Threading	Patrick Rudolph
2019-09-09	intel/fsp_broadwell_de: Add early timestamps	Kyösti Mälkki
2019-09-09	intel/fsp_broadwell_de: Enable CONSOLE_CBMEM by default	Kyösti Mälkki
2019-09-09	soc/intel/common/block/cse: Add helper function heci_send_receive	Sridhar Siricilla
2019-09-09	soc/intel/cannonlake: Allow coreboot to handle SPI lockdown	Subrata Banik
2019-09-09	soc/intel/cannonlake: Add ability to disable Heci1	Bora Guvendik
2019-09-06	soc/intel/skylake: Add Lewisburg family PCH support	Maxim Polyakov
2019-09-05	soc/intel/cannonlake: memory spd data debug	Eric Lai
2019-09-03	soc/skylake: do not rely on P2SB data to generate DRHD	Angel Pons
2019-09-03	soc/intel/common/timer: Fix cosmetic errors as per CB:35148 review	Subrata Banik
2019-09-03	soc/intel/common/acpi/dptf: Add fan based active cooling for TSR sensors	Sumeet Pawnikar
2019-09-02	soc/intel/common/timer: Make TSC frequency calculation dynamically	Subrata Banik
2019-09-02	soc/skylake: prevent null pointer dereferences	Angel Pons
2019-09-02	soc/intel/quark: Remove variable set but not used	Elyes HAOUAS
2019-09-02	soc/intel/skylake: enable GMM in devicetree	Maxim Polyakov
2019-09-02	security/intel: Add TXT infrastructure	Patrick Rudolph
2019-08-30	soc/intel/skl/acpi: add description for missing PCIe ports	Maxim Polyakov
2019-08-30	soc/intel/skylake: Remove duplicated PCI Id	Maxim Polyakov
2019-08-30	intel/quark: Use common romstage entry	Kyösti Mälkki
2019-08-30	intel/quark: Select NO_SMM	Kyösti Mälkki
2019-08-30	intel/quark: Remove extra steps on entry to romstage	Kyösti Mälkki
2019-08-29	intel/fsp_broadwell_de: Move and rename smm_lock()	Kyösti Mälkki
2019-08-29	intel/fsp_broadwell_de: Use smm_subregion()	Kyösti Mälkki
2019-08-29	soc/intel/fsp_broadwell_de: Implement SystemAgent TSEG functions	Patrick Rudolph
2019-08-28	intel/broadwell: Use smm_subregion()	Kyösti Mälkki
2019-08-28	intel/haswell,broadwell: Rename EMRR to PRMRR	Kyösti Mälkki
2019-08-28	intel/braswell: Use smm_subregion()	Kyösti Mälkki
2019-08-28	intel/fsp_baytrail: Use smm_subregion()	Kyösti Mälkki
2019-08-28	google/rambi,intel/baytrail: Simplified romstage flow	Kyösti Mälkki
2019-08-28	soc/intel: Move fill_postcar_frame to memmap.c	Kyösti Mälkki
2019-08-28	soc/intel/cnl: Add CML IGD IDs	Meera Ravindranath
2019-08-28	soc/intel/common/block: Provide mmc.c for setting dll registers	Kane Chen
2019-08-27	intel/baytrail: Use smm_subregion()	Kyösti Mälkki
2019-08-27	intel/baytrail: Reorganize romstage.c	Kyösti Mälkki