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path: root/src/soc/intel
AgeCommit message (Expand)Author
2020-12-03src: Remove redundant use of ACPI offset(0)Elyes HAOUAS
2020-12-03cbfs: Introduce cbfs_ro_map() and cbfs_ro_load()Julius Werner
2020-12-02cbfs: Simplify load/map API names, remove type argumentsJulius Werner
2020-12-02cbfs: Enable CBFS mcache on most chipsetsJulius Werner
2020-12-02soc/intel/common/cse: Perform cse_fw_sync on BS_PRE_DEVICE entryFurquan Shaikh
2020-12-02soc/intel/skylake: Fix compilation under x86_64Patrick Rudolph
2020-12-02soc/intel/elkhartlake: Update KconfigTan, Lean Sheng
2020-12-02soc/intel/skylake: Map VBIOS IDsPaul Menzel
2020-12-01soc/intel/common/block/smm/smihandler: Fix compilation under x86_64Patrick Rudolph
2020-12-01soc/intel/common/block/cpu/car/exit_car: Fix compilation on x86_64Patrick Rudolph
2020-12-01soc/intel/common/block/cpu/car/cache_as_ram: Add x86_64 supportPatrick Rudolph
2020-12-01soc/intel/common/block/systemagent: Fix compilation on x86_64Patrick Rudolph
2020-11-30soc/intel/skylake: Fix commentFelix Singer
2020-11-30soc/intel/alderlake: Add initial chipset.cbTim Wawrzynczak
2020-11-30soc/intel/tigerlake: Add some helper macros for accessing TCSS DMA devicesTim Wawrzynczak
2020-11-30lp4x: Add new memory parts and generate SPDsNick Vaccaro
2020-11-29soc/intel: Configure P2SB before other PCH controllersFurquan Shaikh
2020-11-29soc/intel/alderlake: Add lp5_ccc_config to the board memory configurationSridhar Siricilla
2020-11-28soc/intel/skl: correct OC pin skip value for disabled usb portsMichael Niewöhner
2020-11-27soc/intel/jasperlake: Enable VT-d and generate DMAR TableMeera Ravindranath
2020-11-25soc/intel/{broadwell,quark}: Drop `PEI_DATA` typedefAngel Pons
2020-11-24soc/intel/xeon_sp: Enable SMI handlerRocky Phagura
2020-11-24soc/intel/xeon_sp: Select INTEL_COMMON_BLOCK_TCOArthur Heymans
2020-11-24soc/intel/xeon_sp: Hook up the PMC driverArthur Heymans
2020-11-24soc/intel/skylake: Support NHLT 1ch DMICBenjamin Doron
2020-11-24soc/intel/skylake: Use correct NHLT_PDM_DEV definitionBenjamin Doron
2020-11-23soc/intel/cannonlake: Add ICC limits for CFL-S DT 4Angel Pons
2020-11-23soc/intel/denverton_ns: Hook up SMMSTOREAngel Pons
2020-11-23soc/intel/alderlake: Update UART0 GPIO as per latest schematicsSubrata Banik
2020-11-23soc/intel/alderlake: Update DCACHE_BSP_STACK_SIZE and DCACHE_RAM_SIZESubrata Banik
2020-11-22soc/intel/alderlake: Fix overlapping memory address used for early GSPI2 and ...Bora Guvendik
2020-11-22soc/intel/tigerlake: Fix overlapping memory address used for early GSPI2 and ...Bora Guvendik
2020-11-22soc/intel/xeon_sp: Work around FSP-T not respecting its own APIArthur Heymans
2020-11-22soc/intel/block/pmclib.c: Properly guard apm_control()Arthur Heymans
2020-11-22soc/intel/common/pmc.c Don't implement a weak function that diesArthur Heymans
2020-11-22soc/intel/block/pmc: Only include the PCI driver when it is not hiddenArthur Heymans
2020-11-22soc/intel/block/pmc: Move pmc_set_acpi_mode() to pmc_lib.cArthur Heymans
2020-11-22soc/intel/denverton_ns: Convert to ASL 2.0 syntaxElyes HAOUAS
2020-11-22soc/intel/braswell/bootblock/bootblock.c: Report the FSP-T outputFrans Hendriks
2020-11-20soc/intel/xeon_sp/cpx: Modify PCH_IOAPIC_BUS_NUMBERArthur Heymans
2020-11-20soc/intel/xeon_sp: Set coreboot defined IOAPIC and HPET BDFArthur Heymans
2020-11-20soc/intel/xeon_sp: Use common P2SB functions to generate HPET IOAPICArthur Heymans
2020-11-20soc/intel/apollolake: use P2SB function to generate DMAR IOAPICArthur Heymans
2020-11-20soc/intel/common/block/p2sb: Add ioapic BDF functionsArthur Heymans
2020-11-20soc/intel/xeon_sp: Use common P2SB functions to generate HPET DMARArthur Heymans
2020-11-20soc/intel/apollolake: use P2SB function to generate DMAR HPETArthur Heymans
2020-11-20soc/intel/common/block/p2sb: Add hpet BDF functionsArthur Heymans
2020-11-20soc/intel/common/p2sb: Add helper function to determine p2sb stateArthur Heymans
2020-11-20soc/intel/xeon_sp: Lock down DMICTLArthur Heymans
2020-11-20soc/intel/xeon_sp/cpx: Lock down P2SB SBIArthur Heymans