coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2019-08-02	soc/intel/common/pch: Move thermal kconfig selection into common/pch	Subrata Banik
2019-08-02	soc/intel/icelake: Make use of common thermal code for ICL	Subrata Banik
2019-08-02	soc/intel/skylake: Make use of common thermal code for SKL	Subrata Banik
2019-08-01	soc/intel/cannonlake/bootblock: Clear the GPI IS & IE registers	David Wu
2019-07-31	soc/intel/skl: Add C232 chipset and reorder IDs	Felix Singer
2019-07-31	soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake	Aamir Bohra
2019-07-31	soc/intel/common/block/lpss: Correct the PCI device reference	Aamir Bohra
2019-07-31	soc/intel/cannonlake: Enable PCH Thermal Sensor configuration for S0ix	Sumeet Pawnikar
2019-07-31	soc/intel/common/block: Enable PCH Thermal Sensor for threshold configuration	Sumeet Pawnikar
2019-07-30	soc/intel/cnl: Only print ME status one time	Tim Wawrzynczak
2019-07-30	soc/intel/cannonlake: Allow coreboot to handle required chipset lockdown	Subrata Banik
2019-07-30	soc/intel/cannonlake: Add new PCI IDs	Felix Singer
2019-07-30	soc/intel/{broad,cannon,sky}: Fix possible out-of-bounds reads	Jacob Garber
2019-07-29	Revert "soc/intel/common: Set controller state to active in uart init"	Christian Walter
2019-07-29	soc/intel/baytrail: Prevent unintended sign extensions	Jacob Garber
2019-07-29	soc/intel/cannonlake: Correct the data type of serial_io_dev	Aamir Bohra
2019-07-26	soc/intel/baytrail/Makefile.inc: Sort entries	Angel Pons
2019-07-25	soc/intel/fsp_broadwell_de: Fix use of config_of()	Kyösti Mälkki
2019-07-25	soc/intel: Guard remaining SA_DEV_ROOT definition	Kyösti Mälkki
2019-07-25	soc/intel/broadwell: Fix case of SA_DEV_ROOT	Kyösti Mälkki
2019-07-25	soc/intel/cannonlake: Split the "internal PME" wake-up into more detail	Paul Fagerburg
2019-07-25	soc/intel/icelake: Add ENABLE_DISPLAY_OVER_EXT_PCIE_GFX kconfig	Subrata Banik
2019-07-24	soc/intel/common: Set controller state to active in GSPI init	Meera Ravindranath
2019-07-24	soc/intel/common: Set controller state to active in uart init	Usha P
2019-07-22	soc/intel/broadwell: Change variable back to u32	Jacob Garber
2019-07-21	soc/intel: Expand SA_DEV_ROOT for ramstage	Kyösti Mälkki
2019-07-21	soc/intel: Change file to __SIMPLE_DEVICE__	Kyösti Mälkki
2019-07-21	soc/intel: Fix chip_info for PCH_DEV_PMC	Kyösti Mälkki
2019-07-21	soc/intel/common: gpio_defs: set trig to disable in PAD_CFG_GPO*	Maxim Polyakov
2019-07-21	soc/intel/common: add PAD_CFG_NF_BUF_TRIG macro	Maxim Polyakov
2019-07-21	soc/intel/skylake: Enable Energy/Performance Bias control	Matthew Garrett
2019-07-19	soc/intel/common/block/xhci: Add API to disable USB devices	Karthikeyan Ramasubramanian
2019-07-19	soc/intel/common: Add SOC specific function to get XHCI USB info	Karthikeyan Ramasubramanian
2019-07-18	soc/intel: Use config_of()	Kyösti Mälkki
2019-07-18	soc/intel: Fix invalid use of 'static'	Kyösti Mälkki
2019-07-18	soc/intel: Use config_of_path(SA_DEVFN_ROOT)	Kyösti Mälkki
2019-07-17	soc/intel/cannonlake: Add device Ids for new CFL SKUs support	Lean Sheng Tan
2019-07-17	soc/intel: Fix regression with hidden PCI devices	Kyösti Mälkki
2019-07-17	intel/fsp_baytrail: Avoid preprocessor with HAVE_SMI_HANDLER	Kyösti Mälkki
2019-07-16	soc/intel/{cnl,icl}: Always use CAR NEM enhanced by default	Angel Pons
2019-07-16	soc/intel/common/block/i2c: Set controller state to active in i2c init	Aamir Bohra
2019-07-16	soc/intel/common/block/lpss: Add provision to set controller power state	Aamir Bohra
2019-07-15	intel/cannonlake: Fix indentation	Kyösti Mälkki
2019-07-15	src: Use '#include <timestamp.h>' when needed	Elyes HAOUAS
2019-07-14	soc/intel/icelake: Update FSP UPDs if IGD is disable in devicetree	Subrata Banik
2019-07-14	soc/intel/icelake: Make use of PCH_DEVFN_HDA macro	Subrata Banik
2019-07-13	soc/intel/cannonlake: Remove unused header files from southbridge.asl	Aamir Bohra
2019-07-13	soc,southbridge/intel: Avoid preprocessor with HAVE_SMI_HANDLER	Kyösti Mälkki
2019-07-13	cpu/x86: Move smm_lock() prototype	Kyösti Mälkki
2019-07-13	soc/intel/cnl: Sync CONFIG_LPSS_UART_FOR_CONSOLE with FSP	Nico Huber