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coreboot
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Some coreboot project code with my work
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intel
Age
Commit message (
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Author
2018-11-05
src/soc/intel/braswell/romstage/romstage.c: Perform RTC init in romstage
Frans Hendriks
2018-11-05
soc/intel/cannonlake: Enable ISH from device
Lijian Zhao
2018-11-05
soc/intel/cannonlake: Remove depreciated UPD selection
Lijian Zhao
2018-11-05
src: Remove unneeded include <arch/ioapic.h>
Elyes HAOUAS
2018-11-05
soc/intel/icelake: Add PID based on Icelake EDS
Aamir Bohra
2018-11-02
soc/intel: Enable GPIO functions in verstage
Duncan Laurie
2018-11-02
soc/intel/icelake: Allow coreboot to reserve stack for fsp
Aamir Bohra
2018-11-01
src: Add missing include <stdint.h>
Elyes HAOUAS
2018-10-31
soc/intel/apollolake: Revert the w/a nWR_24 setting
John Zhao
2018-10-31
soc/intel/icelake: Open ports 0x60,0x64 for keyboard controller
Shelley Chen
2018-10-30
src: Add missing include <stdint.h>
Elyes HAOUAS
2018-10-27
soc/intel/*: Make FSP header path user configurable
Patrick Georgi
2018-10-26
soc/intel/icelake: Do initial SoC commit
Aamir Bohra
2018-10-26
soc/intel/cannonlake: Add back PM TIMER EMULATION
Lijian Zhao
2018-10-25
soc/intel: Consolidate FSP CAR setup and teardown code
Praveen hodagatta pranesh
2018-10-25
soc/intel/cannonlake: Enable S4 sleep state support
praveen hodagatta pranesh
2018-10-24
vboot: fix CONFIG_RESUME_PATH_SAME_AS_BOOT S3 resume logic
Joel Kitching
2018-10-23
src: Remove unneeded whitespace
Elyes HAOUAS
2018-10-23
soc/intel/common/block/gpio: Allow GPI to be dual-routed
Furquan Shaikh
2018-10-23
soc/intel/common/block/gpio: Configure Tx Disable in IO standby for GPIs
Furquan Shaikh
2018-10-23
soc/intel/apollolake: Add reset code to postcar stage
Patrick Georgi
2018-10-22
intel: Use CF9 reset (part 2)
Patrick Rudolph
2018-10-22
intel: Use CF9 reset (part 1)
Patrick Rudolph
2018-10-19
soc/intel/cannonlake: Enable HDA driver support
praveen hodagatta pranesh
2018-10-18
intel/common/block: Fix issue found by klockwork
John Zhao
2018-10-18
soc/intel/skylake: Prevent disabling of TCO
Naresh G Solanki
2018-10-17
soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions
praveen hodagatta pranesh
2018-10-17
soc/intel/cannonlake: Add new cannon lake PCH-H support
praveen hodagatta pranesh
2018-10-12
drivers/intel/fsp2_0: Hook up IntelFSP repo
Patrick Georgi
2018-10-11
src: Move common IA-32 MSRs to <cpu/x86/msr.h>
Elyes HAOUAS
2018-10-11
src: Replace MSR addresses with macros
Elyes HAOUAS
2018-10-11
selfboot: remove bounce buffers
Ronald G. Minnich
2018-10-11
soc/intel/common/block/gpio: check for NULL using if statement
Bora Guvendik
2018-10-10
soc/intel/skylake: Set PCIEXPWAK_DIS if WAKE# pin is not enabled
Furquan Shaikh
2018-10-09
soc/intel/cannonlake: Add PCIE ASL entry
Subrata Banik
2018-10-09
soc/intel/cannonlake: Make correct IRQ mapping for CNL SA and PCH PCI devices
Subrata Banik
2018-10-09
soc/intel/common/acpi: Fix ACPI Namespace lookup failure, AE_ALREADY_EXISTS i...
Subrata Banik
2018-10-09
soc/intel/common/block/pcr: Add NULL pointer check in pcr_execute_sideband_msg()
Subrata Banik
2018-10-09
soc/intel/cannonlake: Disable Legacy PME for Root ports
Subrata Banik
2018-10-09
soc/intel/cannonlake: Ensure FSP don't override ITSS IPCx registers
Subrata Banik
2018-10-09
soc/intel/skylake: Ensure FSP don't override ITSS IPCx registers
Subrata Banik
2018-10-09
soc/intel/common/pch: Select Kconfig for ITSS polarity configuration
Subrata Banik
2018-10-08
Move compiler.h to commonlib
Nico Huber
2018-10-08
soc/intel/skylake: Fix ‘dev’ pointer NULL before being dereferenced
Subrata Banik
2018-10-08
smmstore: Add a key/val store facility in flash, mediated through SMM
Patrick Georgi
2018-10-08
src: Use tabs for indentation
Elyes HAOUAS
2018-10-06
soc/intel/common, mb/google, mb/siemens: Use lower case x for RXD
Furquan Shaikh
2018-10-06
soc/intel/common/block/hda: Enable static scanning of devices under HDA
Furquan Shaikh
2018-10-06
soc/intel/.../hda: Add and use config for initialization of HDA codecs
Furquan Shaikh
2018-10-05
soc/intel/skylake: check for NULL with if condition
Pratik Prajapati
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