coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-07-29	soc/intel/jasperlake: Clean up report_cpu_info() function	Usha P
2020-07-28	src: Never set ISA Enable on PCI bridges	Angel Pons
2020-07-28	soc/intel/braswell/fadt.c: Use `ACPI_ADDRESS_SPACE_IO` macro	Angel Pons
2020-07-28	broadwell: Factor out PIRQ routing from devicetree	Angel Pons
2020-07-28	soc/intel/cannonlake: Configure SataPwrOptEnable only if SATA is enabled	Felix Singer
2020-07-28	soc/intel/apollolake: Simplify is-device-enabled checks	Felix Singer
2020-07-28	soc/intel/jasperlake: Simplify is-device-enabled checks	Felix Singer
2020-07-28	soc/intel/tigerlake: Simplify is-device-enabled checks	Felix Singer
2020-07-28	Revert "src: Remove unused include <cpu/x86/smm.h>"	Patrick Rudolph
2020-07-27	soc/intel/jasperlake: Invoke PCIe root port swapping	Karthikeyan Ramasubramanian
2020-07-26	soc/intel/tigerlake: Disable CPU PCIe in FSP	Shaunak Saha
2020-07-26	soc/intel/tigerlake: Disable VT-d and no DMAR table for pre-QS platform	John Zhao
2020-07-26	soc/intel/common/basecode: Implement CSE update flow	Rizwan Qureshi
2020-07-26	src/soc/intel: Add include <types.h>	Elyes HAOUAS
2020-07-26	soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIG	Maxim Polyakov
2020-07-26	soc/intel/common/hda: Add HDA ID for Jasper Lake	yan.liu
2020-07-26	soc/intel/jasperlakelake: Rename pch_init() code	Usha P
2020-07-26	src: Update bare access to BOOL CONFIG_ vals to CONFIG()	Martin Roth
2020-07-26	src: Change BOOL CONFIG_ to CONFIG() in comments & strings	Martin Roth
2020-07-26	src: Remove whitespace between 'sizeof' and '('	Elyes HAOUAS
2020-07-26	{sb,soc}/intel/*/.c: Use macros for PCI COMMAND bits	Angel Pons
2020-07-26	cpu,soc/intel: Drop select SMP	Kyösti Mälkki
2020-07-26	src: Remove unused 'include <cbmem.h>'	Elyes HAOUAS
2020-07-26	src: Remove extra lines in license header	Elyes HAOUAS
2020-07-26	skylake boards: Factor out copy-pasted PIRQ routes	Angel Pons
2020-07-26	src: Remove unused include <cpu/x86/smm.h>	Elyes HAOUAS
2020-07-26	soc/skylake: Configure SATA options only if SATA is enabled	Felix Singer
2020-07-25	soc/intel/baytrail/southcluster.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/include/soc/irq.h: Add braces	Angel Pons
2020-07-25	soc/intel/baytrail: Simplify pattrs definitions	Angel Pons
2020-07-25	soc/intel/baytrail/smm.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/smihandler.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/cpu.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/sd.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/lpss.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/lpe.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/{baytrail,braswell}: Drop unneeded `return`	Angel Pons
2020-07-25	soc/intel/baytrail/iosf.c: Add missing braces	Angel Pons
2020-07-25	soc/intel/baytrail/elog.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/cpu.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/acpi.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/bootblock/bootblock.c: Move functions	Angel Pons
2020-07-25	soc/intel/baytrail: Retype some pointers	Angel Pons
2020-07-25	soc/intel/tigerlake: Update Pkg C-State latencies	Ravi Sarawadi
2020-07-25	soc/intel/tigerlake: Set power limits for Tiger Lake Y-SKU	Sumeet R Pawnikar
2020-07-25	soc/intel/tigerlake: Update Tiger Lake SA IDs	Derek Huang
2020-07-24	soc/intel/common/gpio_defs: Remove unused macro for NF	Maxim Polyakov
2020-07-24	soc/intel/common/gpio_defs: Undo set TxDRxE in GPI_TRIG_OWN()	Maxim Polyakov
2020-07-24	soc/intel/common/gpio_defs: Improve some GPI macros	Maxim Polyakov
2020-07-23	soc/intel/xeon_sp/cpx: display SystemMemoryMapHob fields	Jonathan Zhang