coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2016-08-06	soc/intel/skylake: Add Kabylake device Ids	Rizwan Qureshi
2016-08-05	soc/intel/quark: Add missing breaks	Lee Leahy
2016-08-05	soc/intel/quark: Add bootblock_c_entry	Lee Leahy
2016-08-05	soc/intel/quark: Clean up debug output levels	Lee Leahy
2016-08-05	soc/intel/quark: Disable FSP serial output	Lee Leahy
2016-08-05	soc/intel/quark: Add FSP 2.0 romstage support	Lee Leahy
2016-08-05	soc/intel/quark: Add FSP 2.0 boot block support	Lee Leahy
2016-08-04	soc/apollolake: Return correct wake status in _SWS	Shaunak Saha
2016-08-04	soc/intel/apollolake: Configure gpio ownership	Jagadish Krishnamoorthy
2016-08-04	soc/intel/skylake: Correct address of I2C5 Device	Barnali Sarkar
2016-08-03	soc/intel/quark: Support access to CPU CR registers	Lee Leahy
2016-08-03	soc/intel/quark: Add header files for FSP 2.0	Lee Leahy
2016-08-03	soc/intel/quark: Prepare for FSP2.0 support	Lee Leahy
2016-08-03	soc/intel/quark: Initialize MTRRs in bootblock	Lee Leahy
2016-08-03	soc/intel/quark: Remove use of EDK-II macros and data types	Lee Leahy
2016-08-03	fsp_broadwell_de: Add DMAR table to ACPI	Werner Zeh
2016-08-03	soc/intel/quark: Make ramstage relocatable	Lee Leahy
2016-08-03	drivers/intel/fsp2_0: Handle FspNotify calls	Lee Leahy
2016-08-03	drivers/intel/fsp2_0: FSP driver handles all FSP errors	Lee Leahy
2016-08-02	google/reef: Add pull up 20K for LPC SERIRQ	Kane Chen
2016-08-02	soc/intel/apollolake: Add iosstate macros for GPIO	Shankar, Vaibhav
2016-08-02	intel/apollolake: Enable upper CMOS bank in bootblock	Furquan Shaikh
2016-08-02	intel/skylake: Fix UART build options	Furquan Shaikh
2016-08-02	intel/lynxpoint,broadwell: Fix eDP display in Windows, SeaBios & Tiano	Prabal Saha
2016-08-01	soc/intel/quark: Enable use of hard reset	Lee Leahy
2016-08-01	soc/intel/common: Fix build error in reset.c	Lee Leahy
2016-08-01	Remove non-ascii & unprintable characters	Martin Roth
2016-08-01	Add newlines at the end of all coreboot files	Martin Roth
2016-08-01	soc/intel/common: Enable MTRR display during bootblock & postcar	Lee Leahy
2016-08-01	soc/intel/quark: Fix car_stage_entry routine name.	Lee Leahy
2016-07-31	src/soc: Capitalize CPU, ACPI, RAM and ROM	Elyes HAOUAS
2016-07-31	intel/broadwell: fix typo	Patrick Georgi
2016-07-31	intel/skylake: Enable signalling of error condition	Patrick Georgi
2016-07-31	Remove extra newlines from the end of all coreboot files.	Martin Roth
2016-07-30	chromeos mainboards: remove chromeos.asl	Aaron Durbin
2016-07-30	soc/intel/apollolake: Include gpe.h in chip.h	Furquan Shaikh
2016-07-29	skylake: fix VSDIO is at 0.8V when SDCard is not inserted	Zhuo-hao.Lee
2016-07-29	soc/intel/apollolake: Remove PEIM GFX from normal mode and S3 resume	Abhay Kumar
2016-07-28	soc/intel/apollolake: Update FSP Header files for version 146_30	Brandon Breitenstein
2016-07-28	intel/apollolake: Update gnvs for dptf	Shaunak Saha
2016-07-28	intel/apollolake: Add soc specific DPTF values	Shaunak Saha
2016-07-28	intel/common: Add ASL code for DPTF	Shaunak Saha
2016-07-28	intel/common/opregion.c: only write 16 bytes to 16 byte field	Martin Roth
2016-07-28	intel/fsp1_1: Add C entry support to locate FSP Temp RAM Init	Subrata Banik
2016-07-28	soc/intel/skylake: Add C entry bootblock support	Subrata Banik
2016-07-28	soc/intel/skylake: Do cache as ram and prepare for C entry	Subrata Banik
2016-07-28	soc/intel/skylake: Use init_vbnv_cmos from vboot vbnv	Furquan Shaikh
2016-07-28	soc/intel/broadwell: Use init_vbnv_cmos from vboot vbnv	Furquan Shaikh
2016-07-28	bootmode: Get rid of CONFIG_BOOTMODE_STRAPS	Furquan Shaikh
2016-07-28	vboot: Separate vboot from chromeos	Furquan Shaikh