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path: root/src/soc/intel
AgeCommit message (Expand)Author
2020-05-14soc/intel: Always advertise MMIO window above 4G in ACPI tablesFurquan Shaikh
2020-05-14soc/intel/common/block/systemagent: Use TOUUD as base for MMIO above 4GFurquan Shaikh
2020-05-13lib/spd_bin: add get_spd_sn functionJamie Chen
2020-05-13src/mainboard: Remove unused 'include <stdlib.h>'Elyes HAOUAS
2020-05-13src: Remove unused '#include <stddef.h>'Elyes HAOUAS
2020-05-13src: Remove unused '#include <stdint.h>'Elyes HAOUAS
2020-05-12soc/intel/skylake: Add ability to set root port ASPMWim Vervoorn
2020-05-12soc/intel/tigerlake: Correct IRQ interruptWonkyu Kim
2020-05-12device/pci_device: Extract pci_domain_set_resources from SOCRaul E Rangel
2020-05-12soc/intel/jasperlake: Remove deprecated UPDsRonak Kanabar
2020-05-12soc/intel/jasperlake: Add SATA related UPDs configurationRonak Kanabar
2020-05-12soc/intel/tigerlake: Control SATA and DMI power optimizationShaunak Saha
2020-05-12soc/intel/skl: Drop weak mainboard_memory_init_paramsAngel Pons
2020-05-11soc/intel/quark: Revamp file headersPatrick Georgi
2020-05-11treewide: Replace BSD-3-Clause and ISC headers with SPDX headersPatrick Georgi
2020-05-11treewide: split off license text, remove extra copyright noticesPatrick Georgi
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-11soc/intel/skylake: Allow setting of PcieRpMaxPayloadWim Vervoorn
2020-05-11soc/intel/tigerlake: Update C-State infoWonkyu Kim
2020-05-11soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKXMichael Niewöhner
2020-05-11soc/intel/jasperlake: Add ACPI device name for Storage controllersKarthikeyan Ramasubramanian
2020-05-11soc/intel/jasperlake: Enable end of post support in FSPAamir Bohra
2020-05-10src: Replace remaining GPLv2 long form headers with SPDX headerElyes HAOUAS
2020-05-09src/: Replace GPL boilerplate with SPDX headersPatrick Georgi
2020-05-09vboot: Clean up pre-RAM use of vboot_recovery_mode_enabled()Julius Werner
2020-05-08{security,soc}/*/Kconfig: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS
2020-05-08soc/intel: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS
2020-05-08soc/intel/skl: Drop `acpi_mainboard_gnvs`Angel Pons
2020-05-07soc/intel/tigerlake: Add PMC to platform ACPI name entryJohn Zhao
2020-05-06treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi
2020-05-06treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi
2020-05-06soc/intel/tgl: Synchronize GPIO ASL table with Linux kernelShaunak Saha
2020-05-06soc/intel/tigerlake: Print HPR_CAUSE0 registerderek.huang
2020-05-05soc/intel/jasperlake: Correct the EMMC PCR Port IDRonak Kanabar
2020-05-05soc/intel/jasperlake: Allow SD card power enable polarity configurationRonak Kanabar
2020-05-05soc/intel/tigerlake: Add PMC mux controlJohn Zhao
2020-05-04soc/intel/tigerlake: Update interrupt settingWonkyu Kim
2020-05-04src/soc/tigerlake: Update SerialIoDebugMode UPD in FSP-MSrinidhi N Kaushik
2020-05-04soc/intel/skl: always enable SataPwrOptEnableMichael Niewöhner
2020-05-04soc/intel/cannonlake: Add DisableHeciRetry to configChristian Walter
2020-05-04soc/intel/common/block/cse: Add boot partition related APIsSridhar Siricilla
2020-05-02acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh
2020-05-01soc/intel/xeon_sp/cpx: Implement hide/unhide P2SB traditional danceAndrey Petrov
2020-05-01soc/intel/xeon_sp/cpx: Enable common P2SBAndrey Petrov
2020-05-01soc/intel/xeon_sp: Add C620 p2sb.hAndrey Petrov
2020-05-01xeon_sp, ocp/tiogapass: remove unused FSP-style GPIO defsMaxim Polyakov
2020-05-01soc/intel/baytrail: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-05-01soc/intel/baytrail: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-05-01soc/intel/braswell: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-05-01soc/intel/cannonlake: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS