coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2020-02-17	soc/mediatek: dsi: Correct bits_per_pixel for MIPI_DSI_FMT_RGB666	Yu-Ping Wu
2020-02-17	soc/mediatek: dsi: reduce the hbp and hfp for phy timing	Jitao Shi
2020-02-17	soc/mediatek: dsi: Increase pcw precision	Yu-Ping Wu
2019-12-04	Change all clrsetbits_leXX() to clrsetbitsXX()	Julius Werner
2019-10-23	soc/mediatek/mt8183: add dphy reset after setting lanes number	Jitao Shi
2019-10-23	soc/mediatek/mt8183: fine tune the phy timing	Jitao Shi
2019-08-15	soc/mediatek: Change DSI init commands to take flexible length array	Hung-Te Lin
2019-08-15	soc/mediatek/mt8183: Add DSI driver	Hung-Te Lin
2019-08-15	soc/mediatek: dsi: Support sending MIPI init commands	Hung-Te Lin
2019-08-15	soc/mediatek: dsi: Refactor video timing calculation	Hung-Te Lin
2019-08-14	soc/mediatek: dsi: Refactor PHY timing calculation	Hung-Te Lin
2019-08-13	soc/mediatek: dsi: Refactor MIPI TX configuration	Hung-Te Lin
2019-08-13	soc/mediatek: dsi: Unify format to bpp conversion	Hung-Te Lin
2019-08-13	soc/mediatek: Create common DSI driver from mt8173	Hung-Te Lin