summaryrefslogtreecommitdiff
path: root/src/soc/mediatek
AgeCommit message (Expand)Author
2021-03-15soc/mediatek/mt8192: devapc: Add domain remap settingNina Wu
2021-03-15mb/google/asurada: revise PMIC and RTC initializationYidi Lin
2021-03-10soc/mediatek/mt8192: mt6315: revise initial settingHsin-Hsiung Wang
2021-03-10soc/mediatek/mt8192: mt6315: update initial flowHsin-Hsiung Wang
2021-03-10soc/mediatek/mt8192: mt6315: update correct slave idHsin-Hsiung Wang
2021-03-08soc/mediatek/mt8192: Increase PRERAM_CBMEM_CONSOLE to 400KYu-Ping Wu
2021-03-08soc/mediatek/mt8173,mt8183: revise SOC DRAM implementationXi Chen
2021-03-08soc/mediatek/mt8192: initialize DRAM using vendor reference codeHuayang Duan
2021-03-08soc/mediatek/common: Move DRAM implementation from mt8192 to commonXi Chen
2021-02-25mb/google/asurada: Enable RTC for event logYu-Ping Wu
2021-02-19memlayout: Store region sizes as separate symbolsJulius Werner
2021-02-16soc/mediatek: Remove unused <string.h>Elyes HAOUAS
2021-02-15soc/mediatek: Remove unused <console/console.h>Elyes HAOUAS
2021-02-05soc/mediatek/mt8192: Use LZ4 compression for MCUsYu-Ping Wu
2021-02-04soc/mediatek/mt8192/spm.c: Add missing <string.h>Elyes HAOUAS
2021-02-03src: Remove unused <boardid.h>Elyes HAOUAS
2021-02-01soc/mediatek/mt8192: Enlarge DRAM_INIT_CODE sizeYu-Ping Wu
2021-01-28mb/google/asurada: Improve boot time by raising little CPU frequencyYidi Lin
2021-01-28soc/mediatek/mt8192: Implement dram all channel calibrationHuayang Duan
2021-01-28soc/mediatek/mt8192: Add mt6315_romstage_initYidi Lin
2021-01-28soc/mediatek/mt8192: Add function to raise the CCI frequencyWeiyi Lu
2021-01-22soc/mediatek/mt8192: pmic: Set efuses manuallyHsin-Hsiung Wang
2021-01-22soc/mediatek/mt8183: Fix pq module size configYu-Ping Wu
2021-01-20soc/mediatek/mt8192: pmic: unlock key protection before initial settingHsin-Hsiung Wang
2021-01-20soc/mediatek/mt8192: pmic: add scp voltage initializationHsin-Hsiung Wang
2021-01-19soc/mediatek/mt8173/dramc_pi_calibration_api.c: Use __func__Elyes HAOUAS
2021-01-19soc/mediatek/mt8173/pmic_wrap.c: Use __func__Elyes HAOUAS
2021-01-19soc/mediatek/mt8192: pmic: enable pwrkey long-press shutdown settingHsin-Hsiung Wang
2021-01-19soc/mediatek/mt8192: pmic: update initial settingHsin-Hsiung Wang
2021-01-19soc/mediatek/mt8192: add clkbuf and srclken_rc MT6359P driverYuchen Huang
2021-01-19soc/mediatek/mt8192: Save dramc shuffle result after calibrationHuayang Duan
2021-01-19soc/mediatek/mt8192: Add dramc ac timing settingHuayang Duan
2021-01-19soc/mediatek/mt8192: Get DDR base information after calibrationHuayang Duan
2021-01-15soc/mediatek/mt8183: Support byte mode and single rank DDRShaoming Chen
2021-01-07soc/mediatek: rtc: Use `bool` as return typeYidi Lin
2021-01-01soc/mediatek: dsi: Fix EoTp flagShaoming Chen
2020-12-31soc/mediatek/mt8192: Move flash_controller.c to common/Yidi Lin
2020-12-31soc/mediatek/mt8192: Add DDR mode register initHuayang Duan
2020-12-31soc/mediatek/mt8192: Do dramc duty calibrationHuayang Duan
2020-12-31soc/mediatek/mt8192: Add dramc 8 phase calibrationHuayang Duan
2020-12-31soc/mediatek/mt8192: Update initial settings of dramcHuayang Duan
2020-12-30soc/mediatek/mt8192: eint: unmask eint event mask registerG.Pangao
2020-12-29soc/mediatek/mt8192: Implement dramc base settings for each frequencyHuayang Duan
2020-12-28soc/mediatek/mt8192: add rtc MT6359P driverYuchen Huang
2020-12-28soc/mediatek/mt8192: devapc: add basic devapc driversNina Wu
2020-12-28soc/mediatek/mt8192: Do dramc pre-settings before calibrationHuayang Duan
2020-12-22soc/mediatek/mt8192: Do dramc software impedance calibrationHuayang Duan
2020-12-22soc/mediatek/mt8192: Do EMI init before dram calibrationHuayang Duan
2020-12-22soc/mediatek/mt8192: Do memory pll init before calibrationHuayang Duan
2020-12-16soc/mediatek/mt8192: Do the dramc pinmux selectionHuayang Duan