Age | Commit message (Expand) | Author |
2021-03-27 | soc/mediatek: Adjust hsa, hbp, hfp packets for MIPI_DSI_MODE_LINE_END | Jitao Shi |
2021-03-24 | soc/mediatek: Use MRC cache API for asurada | Yu-Ping Wu |
2021-03-24 | soc/mediatek/mt8192: Enlarge ROMSTAGE to 272K | Yu-Ping Wu |
2021-03-22 | soc/mediatek/mt8192: devapc: Add SCP domain setting | Tinghan Shen |
2021-03-17 | vendorcode/mt8192: devapc: fix register offset for PCIe domain | Nina Wu |
2021-03-16 | cbfs: Remove prog_locate() for stages and rmodules | Julius Werner |
2021-03-16 | soc/mediatek/mt8192: adjust i2c "tLOW" and "tSU,STO" | Daolong Zhu |
2021-03-15 | soc/mediatek/mt8192: devapc: Add domain remap setting | Nina Wu |
2021-03-15 | mb/google/asurada: revise PMIC and RTC initialization | Yidi Lin |
2021-03-10 | soc/mediatek/mt8192: mt6315: revise initial setting | Hsin-Hsiung Wang |
2021-03-10 | soc/mediatek/mt8192: mt6315: update initial flow | Hsin-Hsiung Wang |
2021-03-10 | soc/mediatek/mt8192: mt6315: update correct slave id | Hsin-Hsiung Wang |
2021-03-08 | soc/mediatek/mt8192: Increase PRERAM_CBMEM_CONSOLE to 400K | Yu-Ping Wu |
2021-03-08 | soc/mediatek/mt8173,mt8183: revise SOC DRAM implementation | Xi Chen |
2021-03-08 | soc/mediatek/mt8192: initialize DRAM using vendor reference code | Huayang Duan |
2021-03-08 | soc/mediatek/common: Move DRAM implementation from mt8192 to common | Xi Chen |
2021-02-25 | mb/google/asurada: Enable RTC for event log | Yu-Ping Wu |
2021-02-19 | memlayout: Store region sizes as separate symbols | Julius Werner |
2021-02-16 | soc/mediatek: Remove unused <string.h> | Elyes HAOUAS |
2021-02-15 | soc/mediatek: Remove unused <console/console.h> | Elyes HAOUAS |
2021-02-05 | soc/mediatek/mt8192: Use LZ4 compression for MCUs | Yu-Ping Wu |
2021-02-04 | soc/mediatek/mt8192/spm.c: Add missing <string.h> | Elyes HAOUAS |
2021-02-03 | src: Remove unused <boardid.h> | Elyes HAOUAS |
2021-02-01 | soc/mediatek/mt8192: Enlarge DRAM_INIT_CODE size | Yu-Ping Wu |
2021-01-28 | mb/google/asurada: Improve boot time by raising little CPU frequency | Yidi Lin |
2021-01-28 | soc/mediatek/mt8192: Implement dram all channel calibration | Huayang Duan |
2021-01-28 | soc/mediatek/mt8192: Add mt6315_romstage_init | Yidi Lin |
2021-01-28 | soc/mediatek/mt8192: Add function to raise the CCI frequency | Weiyi Lu |
2021-01-22 | soc/mediatek/mt8192: pmic: Set efuses manually | Hsin-Hsiung Wang |
2021-01-22 | soc/mediatek/mt8183: Fix pq module size config | Yu-Ping Wu |
2021-01-20 | soc/mediatek/mt8192: pmic: unlock key protection before initial setting | Hsin-Hsiung Wang |
2021-01-20 | soc/mediatek/mt8192: pmic: add scp voltage initialization | Hsin-Hsiung Wang |
2021-01-19 | soc/mediatek/mt8173/dramc_pi_calibration_api.c: Use __func__ | Elyes HAOUAS |
2021-01-19 | soc/mediatek/mt8173/pmic_wrap.c: Use __func__ | Elyes HAOUAS |
2021-01-19 | soc/mediatek/mt8192: pmic: enable pwrkey long-press shutdown setting | Hsin-Hsiung Wang |
2021-01-19 | soc/mediatek/mt8192: pmic: update initial setting | Hsin-Hsiung Wang |
2021-01-19 | soc/mediatek/mt8192: add clkbuf and srclken_rc MT6359P driver | Yuchen Huang |
2021-01-19 | soc/mediatek/mt8192: Save dramc shuffle result after calibration | Huayang Duan |
2021-01-19 | soc/mediatek/mt8192: Add dramc ac timing setting | Huayang Duan |
2021-01-19 | soc/mediatek/mt8192: Get DDR base information after calibration | Huayang Duan |
2021-01-15 | soc/mediatek/mt8183: Support byte mode and single rank DDR | Shaoming Chen |
2021-01-07 | soc/mediatek: rtc: Use `bool` as return type | Yidi Lin |
2021-01-01 | soc/mediatek: dsi: Fix EoTp flag | Shaoming Chen |
2020-12-31 | soc/mediatek/mt8192: Move flash_controller.c to common/ | Yidi Lin |
2020-12-31 | soc/mediatek/mt8192: Add DDR mode register init | Huayang Duan |
2020-12-31 | soc/mediatek/mt8192: Do dramc duty calibration | Huayang Duan |
2020-12-31 | soc/mediatek/mt8192: Add dramc 8 phase calibration | Huayang Duan |
2020-12-31 | soc/mediatek/mt8192: Update initial settings of dramc | Huayang Duan |
2020-12-30 | soc/mediatek/mt8192: eint: unmask eint event mask register | G.Pangao |
2020-12-29 | soc/mediatek/mt8192: Implement dramc base settings for each frequency | Huayang Duan |