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path: root/src/soc/mediatek
AgeCommit message (Expand)Author
2020-03-12vboot: remove extraneous vboot_recovery_mode_memory_retrainJoel Kitching
2020-03-06soc/mediatek/mt8183: Improve the DRAMC runtime config flowHuayang Duan
2020-03-06soc/mediatek/mt8183: Do TX tracking for DRAM DVFS featureHuayang Duan
2020-03-06soc/mediatek/mt8183: Correct EMI bandwidth threshold for DVFS switchHuayang Duan
2020-02-26treewide: capitalize 'USB'Elyes HAOUAS
2020-02-25soc/mediatek/mt8183: Fix programming error of DRAMC settingHuayang Duan
2020-02-25soc/mediatek: Fix typos in commentsElyes HAOUAS
2020-02-17soc/mediatek: dsi: Correct bits_per_pixel for MIPI_DSI_FMT_RGB666Yu-Ping Wu
2020-02-17soc/mediatek: dsi: reduce the hbp and hfp for phy timingJitao Shi
2020-02-17soc/mediatek: dsi: Increase pcw precisionYu-Ping Wu
2020-01-28drivers/spi/spi_flash: remove spi flash namesAaron Durbin
2020-01-10soc/mediatek/mt8183: Restore vcore after DRAM calibrationHuayang Duan
2019-12-20soc/mediatek/mt8183: Use DDR clock to compute Tx delay cellHuayang Duan
2019-12-20src: Replace min/max() with MIN/MAX()Elyes HAOUAS
2019-12-19soc/{amd,cavium,mediatek,sifive}: Remove unused <stdlib.h>Elyes HAOUAS
2019-12-19src: Remove unneeded 'include <delay.h>'Elyes HAOUAS
2019-12-12soc/mediatek/mt8183: skip fast calibration for high frequency of TX RX windowHuayang Duan
2019-12-04Change all clrsetbits_leXX() to clrsetbitsXX()Julius Werner
2019-11-26soc/mediatek/mt8183: disable BBLPM of DCXO coreWeiyi Lu
2019-11-18include: Make stdbool.h a separate fileJulius Werner
2019-11-16soc/mediatek/mt8183: Get more space for PreRAM memconsoleHung-Te Lin
2019-11-14lib/fmap: Add optional pre-RAM cacheJulius Werner
2019-11-11soc/mediatek: Add missing '#include <console/console.h>'Elyes HAOUAS
2019-11-03arch/arm64: Pass cbmem_top to ramstage via calling argumentArthur Heymans
2019-11-01lib/cbmem_top: Add a common cbmem_top implementationArthur Heymans
2019-11-01soc/{mediatek,sifive}: Remove unused 'include <arch/barrier.h>'Elyes HAOUAS
2019-10-31soc/mediatek/mt8183: Disable DRAM DVFS in recovery modeYu-Ping Wu
2019-10-28soc/mediatek/mt8183: Pass MR values as function argumentsYu-Ping Wu
2019-10-24soc/mediatek/mt8183: Add udelay after setting voltagesYu-Ping Wu
2019-10-24soc/mediatek/mt8183: Improve DRAM calibration logsYu-Ping Wu
2019-10-24soc/mediatek/mt8183: Correct continuation line indentYu-Ping Wu
2019-10-24soc/mediatek/mt8183: Force retraining memory if requestedHung-Te Lin
2019-10-23soc/mediatek/mt8183: Fix incorrect usage of sizeofYu-Ping Wu
2019-10-23soc/mediatek/mt8183: add dphy reset after setting lanes numberJitao Shi
2019-10-23soc/mediatek/mt8183: fine tune the phy timingJitao Shi
2019-10-21src/{device,drivers,mb,nb,soc,sb}: Remove unused 'include <console/console.h>'Elyes HAOUAS
2019-10-21soc/mediatek/mt8183: Force DRAM retraining if hotkey pressedYu-Ping Wu
2019-10-21soc/mediatek/mt8183: Skip fast calibration in recovery modeYu-Ping Wu
2019-10-20src: Remove unused 'include <string.h>'Elyes HAOUAS
2019-10-18soc/mediatek/mt8183: Compress calibration blob with LZ4Hung-Te Lin
2019-10-18soc/mediatek/mt8183: Pass impedance data as a function argumentYu-Ping Wu
2019-10-18soc/mediatek/mt8183: Run calibration with multiple frequencies for DVFS switchHuayang Duan
2019-10-18soc/mediatek/mt8183: Adjust DRAM voltages for each DRAM frequencyHuayang Duan
2019-10-18soc/mediatek/mt8183: Allow modifying vddq voltageHsin-Hsiung Wang
2019-10-18soc/mediatek/mt8183: Allow modifying vdram1 voltageHsin-Hsiung Wang
2019-10-18soc/mediatek/mt8183: Share console for calibration blob outputHung-Te Lin
2019-10-17soc/mediatek/mt8183: Verify checksum of cached calibration dataYu-Ping Wu
2019-10-17soc/mediatek/mt8183: Remove unnecessary DRAM register settingsYu-Ping Wu
2019-10-17soc/mediatek/mt8183: Fix DDR phy config numberYu-Ping Wu
2019-10-17soc/mediatek/mt8183: Refactor DRAM init by bit fields APIHung-Te Lin