coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2015-03-02	coreboot arm: Define function for setting cntfrq register	Furquan Shaikh
2015-02-17	tegra124: Correct cpu power on sequence and CPUPWRGOOD_TIME	Jimmy Zhang
2015-01-04	tegra124: configure DP with correct pixel clock	Vince Hsu
2014-12-17	tegra124: change PLLD VCO calculation algorithm	Ken Chang
2014-12-16	tegra124: Allow "best" PLLD parameters for unmatched pixel clock.	Hung-Te Lin
2014-12-16	tegra124: clock: Enforce PLL constraints for VCO and CF	Julius Werner
2014-12-15	tegra124: Setup clock PLLD by approximating display panel pixel clock.	Hung-Te Lin
2014-12-15	tegra124: A couple clock fixes.	Gabe Black
2014-11-14	tegra124: Add some functions for resetting peripherals.	Gabe Black
2014-11-14	t124: Clean up display init functions	Jimmy Zhang
2014-11-13	t124: Skip PLLP init to 408MHz	Jimmy Zhang
2014-11-13	t124: nyan: Enable lock bit on pll	Jimmy Zhang
2014-11-13	tegra124: fix PLLU parameters	Andrew Bresticker
2014-11-13	tegra124: Make the PLLX frequency selectable by model.	Gabe Black
2014-09-22	tegra124/nyan: memory and display updates	Andrew Bresticker
2014-09-13	tegra124/nyan: display, clock, and other updates	Julius Werner
2014-09-12	tegra124/nyan: various fixes and additions	Hung-Te Lin
2014-09-11	tegra124/nyan: rougly stable code base	Gabe Black
2014-08-18	tegra: Change how tegra124 and tegra include files from each other.	Gabe Black
2014-08-13	Tegra,Tegra124: proposed layout for file hierarchy with example	Ronald G. Minnich