summaryrefslogtreecommitdiff
path: root/src/soc/nvidia/tegra124/display.c
AgeCommit message (Expand)Author
2015-01-04tegra124: configure DP with correct pixel clockVince Hsu
2014-12-30tegra124: display clock should be initialized before any accessVince Hsu
2014-12-17tegra124: modify panel init sequenceKen Chang
2014-12-17tegra124: change PLLD VCO calculation algorithmKen Chang
2014-12-16tegra124: Initialize display panel by EDID.Hung-Te Lin
2014-12-15tegra124: Setup clock PLLD by approximating display panel pixel clock.Hung-Te Lin
2014-11-14t124: Clean up display init functionsJimmy Zhang
2014-11-12tegra124: Program PWM1 to drive panel backlightAndrew Chew
2014-11-12tegra124: nyan: Keep in memory structures below 4GB.Gabe Black
2014-10-22tegra/nyan*: sdram updatesTom Warren
2014-09-22tegra124/nyan: memory and display updatesAndrew Bresticker
2014-09-13tegra124/nyan: display, clock, and other updatesJulius Werner
2014-09-12tegra124/nyan: various fixes and additionsHung-Te Lin
2014-09-11tegra124/nyan: rougly stable code baseGabe Black