| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-04-21 | arm(64): Manually clean up the mess left by write32() transition | Julius Werner |
| 2015-04-21 | arm(64): Globally replace writel(v, a) with write32(a, v) | Julius Werner |
| 2015-04-21 | arm(64): Replace write32() and friends with writel() | Julius Werner |
| 2015-02-17 | T124: perform ram_repair when CPU rail is powered on in warmboot | Yen Lin |
| 2015-01-09 | tegra124: fix and fine tune the warm boot code | Joseph Lo |
| 2014-11-14 | tegra124: fix the dangerous VPR write order | Joseph Lo |
| 2014-11-13 | tegra124: fix OSC initialization on LP0 resume | Andrew Bresticker |
| 2014-09-22 | tegra124/nyan: memory and display updates | Andrew Bresticker |
 |
index : coreboot | |
| Some coreboot project code with my work | vimacs |
| summaryrefslogtreecommitdiff |