index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
/
nvidia
/
tegra210
/
include
Age
Commit message (
Expand
)
Author
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-09-30
vboot: provide a unified flow for separate verstage
Aaron Durbin
2015-09-09
verstage: use common program.ld for linking
Aaron Durbin
2015-09-07
Drop "See file CREDITS..." comment
Stefan Reinauer
2015-08-28
T210: Add 128MB VPR allocation/carveout
Tom Warren
2015-08-28
Smaug: Add NVDEC and TSEC carveouts
Tom Warren
2015-07-23
t210: Enable WRAP to INCR burst type conversion in MSELECT
Yen Lin
2015-07-23
t210: change memlayout.ld
Yen Lin
2015-07-21
t210: Correct device MMIO range
Jimmy Zhang
2015-07-16
t210: Reorganize memlayout.ld
Furquan Shaikh
2015-07-16
t210: Add PINMUX macros for drive strength
Furquan Shaikh
2015-07-13
t210: Add TZDRAM_BASE param to BL31_MAKEARGS
Furquan Shaikh
2015-07-09
t210: set CAR2PMC_CPU_ACK_WIDTH to 0
Yen Lin
2015-07-09
t210: i2c6: enable SOR_SAFE and DPAUX1 clocks for i2c6 to work
Yen Lin
2015-07-08
memlayout: Add timestamp regions for t210 and cygnus
Stefan Reinauer
2015-07-07
T210: UTMIP: Correct UTMIP PLL programming as per Mark Kuo
Tom Warren
2015-07-06
t210: MTC cleanup
Furquan Shaikh
2015-06-30
nvidia/tegra210: reserve more room for the romstage in vboot builds
Patrick Georgi
2015-06-30
nvidia/tegra210: add new SoC
Patrick Georgi