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path: root/src/soc/nvidia/tegra210/include
AgeCommit message (Expand)Author
2016-07-31src/soc: Capitalize CPU, ACPI, RAM and ROMElyes HAOUAS
2016-07-31Remove extra newlines from the end of all coreboot files.Martin Roth
2016-07-12Documentation: Fix doxygen errorsMartin Roth
2016-02-12tegra132/210: Remove memlayout_vboot2.ldJulius Werner
2016-01-18header files: Fix guard name comments to match guard namesMartin Roth
2015-11-17arm64: tegra132: tegra210: Remove old arm64/stage_entry.SJulius Werner
2015-11-11arm64: mmu: Make page table manipulation work across stagesJulius Werner
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-09-30vboot: provide a unified flow for separate verstageAaron Durbin
2015-09-09verstage: use common program.ld for linkingAaron Durbin
2015-09-07Drop "See file CREDITS..." commentStefan Reinauer
2015-08-28T210: Add 128MB VPR allocation/carveoutTom Warren
2015-08-28Smaug: Add NVDEC and TSEC carveoutsTom Warren
2015-07-23t210: Enable WRAP to INCR burst type conversion in MSELECTYen Lin
2015-07-23t210: change memlayout.ldYen Lin
2015-07-21t210: Correct device MMIO rangeJimmy Zhang
2015-07-16t210: Reorganize memlayout.ldFurquan Shaikh
2015-07-16t210: Add PINMUX macros for drive strengthFurquan Shaikh
2015-07-13t210: Add TZDRAM_BASE param to BL31_MAKEARGSFurquan Shaikh
2015-07-09t210: set CAR2PMC_CPU_ACK_WIDTH to 0Yen Lin
2015-07-09t210: i2c6: enable SOR_SAFE and DPAUX1 clocks for i2c6 to workYen Lin
2015-07-08memlayout: Add timestamp regions for t210 and cygnusStefan Reinauer
2015-07-07T210: UTMIP: Correct UTMIP PLL programming as per Mark KuoTom Warren
2015-07-06t210: MTC cleanupFurquan Shaikh
2015-06-30nvidia/tegra210: reserve more room for the romstage in vboot buildsPatrick Georgi
2015-06-30nvidia/tegra210: add new SoCPatrick Georgi
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