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path: root/src/soc/nvidia
AgeCommit message (Expand)Author
2015-03-04coreboot t132: Stack init re-workFurquan Shaikh
2015-03-04t132: kick off core complex after loading MTS microcodeAaron Durbin
2015-03-04t132: load MTS microcodeAaron Durbin
2015-03-04t132: Replace fallback with CONFIG_CBFS_PREFIXMarc Jones
2015-03-04t132: Add shared romstageAaron Durbin
2015-03-04coreboot rush: Add dram init codeFurquan Shaikh
2015-03-04coreboot rush: Add support for basic romstageFurquan Shaikh
2015-03-04coreboot t132: Enable loading of romstage from CBFS mediaFurquan Shaikh
2015-03-04coreboot t132: Remove init pllx for nowFurquan Shaikh
2015-03-04coreboot t132,rush: Add mainboard specific bootblock_initFurquan Shaikh
2015-03-03coreboot t132: Add clock.c to all three stages of corebootFurquan Shaikh
2015-03-02coreboot arm: Define function for setting cntfrq registerFurquan Shaikh
2015-03-02tegra132: Enable bootblock support in tegra132 including UART supportFurquan Shaikh
2015-02-25tegra124: Clean up ARM UART driver buildMarc Jones
2015-02-17tegra132: Postprocess bootblock properlyPatrick Georgi
2015-02-17tegra132: Add BCT support in tegra132 socFurquan Shaikh
2015-02-17T124: perform ram_repair when CPU rail is powered on in warmbootYen Lin
2015-02-17T124: perform ram_repair when CPU rail is powered on in coldbootYen Lin
2015-02-17tegra124: Correct cpu power on sequence and CPUPWRGOOD_TIMEJimmy Zhang
2015-02-13tegra132: Fix build for verstageMarc Jones
2015-02-06include/types.h: Provide BIT() macroAlexandru Gagniuc
2015-01-27CBMEM: Always use DYNAMIC_CBMEMKyösti Mälkki
2015-01-27vboot2: implement select_firmware for pre-romstage verificationDaisuke Nojiri
2015-01-27vboot2: add verstageStefan Reinauer
2015-01-26tegra132: Add support for tegra132 socFurquan Shaikh
2015-01-14Revert "vboot2: add verstage"Paul Menzel
2015-01-13vboot2: add verstageDaisuke Nojiri
2015-01-09nyan*: I2C: Fix bus clear BC_TERMINATE naming.Tom Warren
2015-01-09tegra124: fix and fine tune the warm boot codeJoseph Lo
2015-01-09tegra: i2c: re-init i2c controller after resetJimmy Zhang
2015-01-04tegra124: configure DP with correct pixel clockVince Hsu
2014-12-30tegra: i2c: Add a timeout to I2C bit clear recovery mechanismJulius Werner
2014-12-30i2c: Add software_i2c driver for I2C debugging and emulationJulius Werner
2014-12-30tegra124: Active dc/sor register change immediatelyVince Hsu
2014-12-30tegra124: display clock should be initialized before any accessVince Hsu
2014-12-26tegra124: Add a utility function to read the cause of the most recent reset.Gabe Black
2014-12-26nyan*: I2C: Implement bus clear when 'ARB_LOST' error occursTom Warren
2014-12-19nyan*: Add fast link training functionsJimmy Zhang
2014-12-17tegra124: modify panel init sequenceKen Chang
2014-12-17nyan*: enable CLAMP_INPUTSKen Chang
2014-12-17ARM: Use LPAE for Virtual Address TranslationDaisuke Nojiri
2014-12-17tegra124: change PLLD VCO calculation algorithmKen Chang
2014-12-16tegra124: Allow "best" PLLD parameters for unmatched pixel clock.Hung-Te Lin
2014-12-16tegra124: Always enable DC when attaching SOR.Hung-Te Lin
2014-12-16nyan*: debug: Add sor registers dump functionJimmy Zhang
2014-12-16tegra124: clock: Enforce PLL constraints for VCO and CFJulius Werner
2014-12-16nyan*: Set SOR_NV_PDISP_SOR_DP_SPARE0 registerJimmy Zhang
2014-12-16nyan*: merge a couple of sor setting difference from kernel driverJimmy Zhang
2014-12-16nyan*: Apply sor fix from kernel dc driverJimmy Zhang
2014-12-16tegra124: Initialize display panel by EDID.Hung-Te Lin
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