summaryrefslogtreecommitdiff
path: root/src/soc/nvidia
AgeCommit message (Expand)Author
2015-01-04tegra124: configure DP with correct pixel clockVince Hsu
2014-12-30tegra: i2c: Add a timeout to I2C bit clear recovery mechanismJulius Werner
2014-12-30i2c: Add software_i2c driver for I2C debugging and emulationJulius Werner
2014-12-30tegra124: Active dc/sor register change immediatelyVince Hsu
2014-12-30tegra124: display clock should be initialized before any accessVince Hsu
2014-12-26tegra124: Add a utility function to read the cause of the most recent reset.Gabe Black
2014-12-26nyan*: I2C: Implement bus clear when 'ARB_LOST' error occursTom Warren
2014-12-19nyan*: Add fast link training functionsJimmy Zhang
2014-12-17tegra124: modify panel init sequenceKen Chang
2014-12-17nyan*: enable CLAMP_INPUTSKen Chang
2014-12-17ARM: Use LPAE for Virtual Address TranslationDaisuke Nojiri
2014-12-17tegra124: change PLLD VCO calculation algorithmKen Chang
2014-12-16tegra124: Allow "best" PLLD parameters for unmatched pixel clock.Hung-Te Lin
2014-12-16tegra124: Always enable DC when attaching SOR.Hung-Te Lin
2014-12-16nyan*: debug: Add sor registers dump functionJimmy Zhang
2014-12-16tegra124: clock: Enforce PLL constraints for VCO and CFJulius Werner
2014-12-16nyan*: Set SOR_NV_PDISP_SOR_DP_SPARE0 registerJimmy Zhang
2014-12-16nyan*: merge a couple of sor setting difference from kernel driverJimmy Zhang
2014-12-16nyan*: Apply sor fix from kernel dc driverJimmy Zhang
2014-12-16tegra124: Initialize display panel by EDID.Hung-Te Lin
2014-12-16i2c: Replace the i2c API.Gabe Black
2014-12-15tegra124: set MOT bit for I2C-over-AUXKen Chang
2014-12-15tegra124: Setup clock PLLD by approximating display panel pixel clock.Hung-Te Lin
2014-12-15tegra124: Release DMA channel at end of transactionDavid Hendricks
2014-12-15tegra124: Use correct mask for APB bus widthDavid Hendricks
2014-12-15nyan: Enable the cbmem console on nyan and allocate space for it in SRAM.Gabe Black
2014-12-15tegra124: More improvements to the clock initialization macros.Gabe Black
2014-12-15tegra: spi: Read the command1 register to ensure the write to it completes.Gabe Black
2014-12-15tegra124: A couple clock fixes.Gabe Black
2014-12-15tegra124: Add tegra_dc_i2c_aux_read to allow reading EDID.Hung-Te Lin
2014-12-15tegra124: Skip display init when vboot says we don't need it.Gabe Black
2014-12-09spi: Eliminate the spi_cs_activate and spi_cs_deactivate functions.Gabe Black
2014-12-09spi: Factor EC protocol details out of the SPI drivers.Gabe Black
2014-12-02Replace hlt with halt()Patrick Georgi
2014-11-18tegra124: remove spurious error messagePatrick Georgi
2014-11-18tegra124: actually parse is_lvdsPatrick Georgi
2014-11-14tegra124: allow tegra124 devices to run vboot rmoduleAaron Durbin
2014-11-14tegra124: i2c: Reset the controller when there's an error.Gabe Black
2014-11-14tegra124: fix the dangerous VPR write orderJoseph Lo
2014-11-14tegra124: Add some functions for resetting peripherals.Gabe Black
2014-11-14t124: Clean up display init functionsJimmy Zhang
2014-11-13arm: Put assembly functions into separate sectionsJulius Werner
2014-11-13tegra124: Add a macro specifically for configuring the I2C controller clocks.Gabe Black
2014-11-13tegra124: Fix some bugs in the clock configuration macros.Gabe Black
2014-11-13t124: Skip PLLP init to 408MHzJimmy Zhang
2014-11-13t124: nyan: Enable lock bit on pllJimmy Zhang
2014-11-13tegra124: fix OSC initialization on LP0 resumeAndrew Bresticker
2014-11-13tegra124: fix PLLU parametersAndrew Bresticker
2014-11-13tegra124: Make the PLLX frequency selectable by model.Gabe Black
2014-11-12tegra124: enable JTAG in Security ModeJimmy Zhang
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-16 11:41:27 +0000