| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-03-28 | Remove libverstage as separate library and source file class | Julius Werner |
| 2016-07-28 | qualcomm/gale: Add required files to enable elog in ramstage | Furquan Shaikh |
| 2016-05-10 | ipq40xx: Break a long line in Makefile.inc | David Hendricks |
| 2016-05-10 | soc/qualcomm/ipq40xx: Add support for BLSP QUP I2C | Varadarajan Narayanan |
| 2016-05-10 | soc/qualcomm/ipq40xx: Return NULL for cbmem_top if DRAM is not initialized | Varadarajan Narayanan |
| 2016-05-10 | soc/qualcomm/ipq40xx: Invoke createxbl.py using `python` | David Hendricks |
| 2016-05-10 | soc/qualcomm/ipq40xx: Add config option for SBL utils path | Varadarajan Narayanan |
| 2016-05-10 | soc/qualcomm/ipq40xx: Update the list of MBNs needed for this SoC | Varadarajan Narayanan |
| 2016-05-10 | soc/qualcomm/ipq40xx: Initial commit for IPQ40xx SoC support | Varadarajan Narayanan |
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index : coreboot | |
| Some coreboot project code with my work | vimacs |
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