coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2021-05-20	soc/amd/common: Show espi init in log	Martin Roth
2021-05-20	soc/intel/xeon_sp: Remove superfluous printk	Arthur Heymans
2021-05-20	baytrail: Factor out INT15 handler	Angel Pons
2021-05-19	sc7280: Reserve wlan & wpss dram memory regions	Ravi Kumar Bokka
2021-05-19	sc7280: memlayout changes for QCSDI & WMM feature	samrab
2021-05-19	sc7280: add qclib support	Ravi Kumar Bokka
2021-05-19	soc/amd/common/block/espi_util: Work around in-band reset race condition	Raul E Rangel
2021-05-19	soc/amd/cezanne/fch: add PCIe GPP clock generator configuration settings	Felix Held
2021-05-19	soc/amd/picasso: move gpp_clk_req_setting definition to chip.h	Felix Held
2021-05-18	soc/intel/alderlake: Add handling of GPIO_COM3 in gpio.asl	Maulik V Vaghela
2021-05-18	cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=y	Arthur Heymans
2021-05-18	intelblocks/gpio: Add NAVFWE bit to PAD_CFG_DW0 mask definition	Maulik V Vaghela
2021-05-18	soc/intel/alderlake: mb/intel/sm: Add tcss code	Deepti Deshatty
2021-05-18	soc/mediatek/mt8195: enable ARM64_USE_ARM_TRUSTED_FIRMWARE	Yidi Lin
2021-05-16	soc/amd/*/Makefile.inc: Strip the quotes	Zheng Bao
2021-05-16	soc/intel/alderlake: Update meminit code due to upd changes FSP 2147 onwards	Bora Guvendik
2021-05-16	vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2162_00	Ronak Kanabar
2021-05-14	soc/intel/tigerlake: Allow devicetree to fill UPD related to TCSS OC	Nick Vaccaro
2021-05-14	soc/intel/alderlake: Update CPU and IGD Device IDs	Maulik V Vaghela
2021-05-14	soc/intel/alderlake: Add known GPIO virtual wire information	Deepti Deshatty
2021-05-14	soc/intel/alderlake: Add known CPU Port IDs for GPIO communities	Deepti Deshatty
2021-05-14	soc/intel/alderlake: Add IOM PCR PID	Deepti Deshatty
2021-05-14	soc/mediatek/mt8195: Initialize DRAM in romstage	Rex-BC Chen
2021-05-14	soc/mediatek: Remove duplicate enum declaration	Rex-BC Chen
2021-05-14	soc/amd/cezanne: Enable GFX HDA FSP UPD	Karthikeyan Ramasubramanian
2021-05-13	src: Match array format in function declarations and definitions	Patrick Georgi
2021-05-13	soc/mediatek/mt8195: change vpp_sel default mux for 4k support	Nancy.Lin
2021-05-13	soc/mediatek/mt8195: configure DMA buffer in DRAM	Rex-BC Chen
2021-05-13	soc/mediatek/mt8195: Enable SCP SRAM	Rex-BC Chen
2021-05-13	soc/amd: factor out acpigen_write_alib_dptc to common code	Felix Held
2021-05-13	soc/amd/cezanne/root_complex: generate DPTC ACPI method	Felix Held
2021-05-12	soc/amd/cezanne/chip.h: add DPTC and tablet mode options	Felix Held
2021-05-12	psp_verstage: remove not-implemented files for cezanne	Kangheui Won
2021-05-12	soc/amd/{common,picasso}: Use common PCIE_GPP_DRIVER driver	Raul E Rangel
2021-05-12	soc/amd/common/block/pci: Capitalize PCI ACPI names	Raul E Rangel
2021-05-12	soc/amd{common,cezanne}: Move pcie_gpp.c to common	Raul E Rangel
2021-05-11	docs: correct and rewrite documentation regarding n/c / unused pads	Michael Niewöhner
2021-05-11	soc/amd/picasso: Disable CBFS MCACHE again	Raul E Rangel
2021-05-11	soc/mediatek/mt8192: add apusys init flow	Chien-Chih Tseng
2021-05-11	soc/mediatek/mt8195: Enable and initialize eint	Yidi Lin
2021-05-11	soc/mediatek/mt8195: Disable UFS reference clock	Yidi Lin
2021-05-10	src: Drop "This file is part of the coreboot project" lines	Angel Pons
2021-05-10	soc/intel/cannonlake: Merge soc_memory_init_params() into its caller	Felix Singer
2021-05-10	soc/intel/skylake: Set proper defaults in chipset devicetree	Felix Singer
2021-05-10	soc/intel/adl: Allow mainboard to fill CmdMirror and DqDqsRetraining	Maulik V Vaghela
2021-05-10	soc/amd/picasso: move acpigen_dptc_call_alib to new common alib	Felix Held
2021-05-10	Revert "soc/amd/common/espi: Don't set alert pin in espi_set_initial_config"	Raul E Rangel
2021-05-10	soc/amd/cezanne: Force resets to be cold	Marshall Dawson
2021-05-10	cezanne/psp_verstage: update SRAM address	Kangheui Won
2021-05-10	amd/cezanne: verify transfer buffer in bootblock	Kangheui Won