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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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Author
2018-09-28
src/*: normalize Google copyright headers
Patrick Georgi
2018-09-26
soc/sifive/fu540: Document #if ENV_ROMSTAGE line
Jonathan Neuschäfer
2018-09-26
soc/sifive/fu540: Remove PLL parameters from sdram.c
Jonathan Neuschäfer
2018-09-26
mb/lowrisc: Remove the Nexys4DDR port
Jonathan Neuschäfer
2018-09-26
soc/intel/common/block: Don't use device_t
Elyes HAOUAS
2018-09-24
amd/common/psp: Remove use of PspBaseLib
Charles Marslett
2018-09-24
soc/amd/stoneyridge/romstage.c: Move STAPM code to SOC specific
Richard Spiegel
2018-09-22
skylake,kabylake: Add support to set eMMC tuning param from dev tree
Pratik Prajapati
2018-09-21
soc/intel/denverton_ns/csme_ie_kt.c: Don't use device_t
Elyes HAOUAS
2018-09-21
soc/intel/braswell/ramstage.c: Add SoC stepping D-1 support
Frans Hendriks
2018-09-21
soc/intel/quark/uart.c: Don't use device_t
Elyes HAOUAS
2018-09-21
soc/intel/skylake: Don't use device_t
Elyes HAOUAS
2018-09-21
soc/broadwell: Don't use device_t
Elyes HAOUAS
2018-09-21
soc/intel/skylake: Include some microcode blobs
Arthur Heymans
2018-09-21
soc/intel/cannonlake: Correct ITSS port id.
praveen hodagatta pranesh
2018-09-20
soc/intel/cannonlake: Remove const for spd_smbus_address
Lijian Zhao
2018-09-20
soc/amd/stoneyridge/romstage.c: Remove obsolete comment
Richard Spiegel
2018-09-20
soc/intel/fsp_broadwell_de: Add fixed VT-d MMIO range to the resources
Werner Zeh
2018-09-20
fsp_broadwell_de: Move DMAR table generation to corresponding VT-d device
Werner Zeh
2018-09-19
amd/stoneyridge: Sync PSP base to MSR
Marshall Dawson
2018-09-18
soc/intel/common/block: Don't use device_t in ramstage
Elyes HAOUAS
2018-09-18
soc/cavium/cn81xx: Don't use device_t in ramstage
Elyes HAOUAS
2018-09-18
cpu/*/car: fix ancient URL explaining XIP range run-time calculation
Stefan Tauner
2018-09-17
mb/google/kahlee/variants/baseboard: Set STAPM percentage
Richard Spiegel
2018-09-17
soc/intel/broadwell: Add PCH_GPIO_PIRQ_INVERT definition
Matt DeVillier
2018-09-15
sifive/hifive-unleashed: enable CBMEM support
Philipp Hug
2018-09-15
soc/sifive: move ram_resource to mainboard
Philipp Hug
2018-09-14
soc/intel/denverton_ns: Enable common block PMC
Julien Viard de Galbert
2018-09-14
soc/sifive/fu540: Implement uart_platform_refclk for UART divisor calculation
Philipp Hug
2018-09-14
soc/sifive/fu540: Initialize SDRAM
Philipp Hug
2018-09-14
soc/sifive/fu540: Switch clock to 1GHz in romstage
Philipp Hug
2018-09-14
soc/sifive/fu540: create ram_resource with actual memory size
Philipp Hug
2018-09-14
arch/riscv: provide a monotonic timer
Philipp Hug
2018-09-14
soc/sifive/fu540: add SiFive supplied header files for SDRAM initialization
Philipp Hug
2018-09-14
complier.h: add __always_inline and use it in code base
Aaron Durbin
2018-09-13
soc/sifive/fu540: Get SDRAM controller out of reset
Philipp Hug
2018-09-13
soc/sifive/fu540: Update clock settings according SiFive bootloader
Philipp Hug
2018-09-13
uart/sifive: make divisor configurable
Philipp Hug
2018-09-13
src/*/intel/: clarify Kconfig options regarding IFD
Stefan Tauner
2018-09-12
soc/sifive/fu540: Initialize PLL and clock
Philipp Hug
2018-09-12
soc/amd/stoneyridge: Fix more GPIO functions
Jonathan Neuschäfer
2018-09-11
amd/stoneyridge: Enable BERT table generation
Marshall Dawson
2018-09-11
amd/stoneyridge: Set BERT region size when no TSEG used
Marshall Dawson
2018-09-11
soc/intel/baytrail: Remove trailing space in log message
Paul Menzel
2018-09-10
soc/sifive: fix compiler warning
Philipp Hug
2018-09-10
soc/sifive/fu540: Makefile: include mtime_init in ramstage
Philipp Hug
2018-09-10
soc/sifive/fu540: Add driver for OTP memory
Philipp Hug
2018-09-10
soc/intel/cannonlake: Correct number of root ports for CNL PCH H
Maulik V Vaghela
2018-09-10
soc/sifive/fu540: add CLINT support
Xiang Wang
2018-09-10
riscv: update mtime initialization
Xiang Wang
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