coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2017-07-13	Rename __attribute__((packed)) --> __packed	Stefan Reinauer
2017-07-13	soc/intel/cannonlake: Add Makefile	Andrey Petrov
2017-07-13	soc/intel/cannonlake: Add bootblock PCH	Andrey Petrov
2017-07-13	soc/intel/cannonlake: Add early CPU initialization	Andrey Petrov
2017-07-13	soc/intel/skylake: reduce postcar stack usage for fsp 2.0	Aaron Durbin
2017-07-12	soc/intel/cannonlake: Add PCI dev macros and IDs	Andrey Petrov
2017-07-12	soc/intel/cannonlake: Add report_platform.c	Andrey Petrov
2017-07-12	soc/amd/stoneyridge: Update header guards and includes	Marshall Dawson
2017-07-12	soc/intel/skylake: Remove “disable SaGv” in recovery mode flow	Subrata Banik
2017-07-12	Revert "soc/intel/skylake: storage: Add 2ms delay before exiting D3"	Subrata Banik
2017-07-12	soc/intel/skylake: Perform PCR read after all PCR write	Subrata Banik
2017-07-11	soc/intel/skylake: Fix PMC address range setup for PCH-H	Nico Huber
2017-07-11	soc/intel/skylake: Set generic I/O decode ranges early	Nico Huber
2017-07-11	binaryPI: Define AGESA blob in CBFS as Kconfig string	Kyösti Mälkki
2017-07-10	sgx: Move SGX code to intel/common/block	Pratik Prajapati
2017-07-08	soc/amd/stoneyridge/northbridge.c: remove unnecessary null check	Martin Kepplinger
2017-07-03	soc/intel/quark: Add I2C debugging	Lee Leahy
2017-07-03	soc/intel/apollolake: Use common gpio for apollolake	Hannah Williams
2017-07-02	soc/intel/quark/spi.c: Explain a read in order to flush buffers	Martin Kepplinger
2017-07-02	soc/intel/cannonlake: Add bootblock.c	Andrey Petrov
2017-07-02	intel/block/cse: Add Cannon Lake SoC PCI device ID	Andrey Petrov
2017-07-02	soc/amd/common: Add initial support for AMD PSP	Marshall Dawson
2017-07-01	soc/intel/skylake: Remove unnecessary P-State and Flex Ratio assignment	Barnali Sarkar
2017-06-29	soc/intel/skylake/Kconfig: Drop useless FSP1.1/2.0 prompts	Nico Huber
2017-06-29	soc/intel/cannonlake: Add UART initialization	Andrey Petrov
2017-06-29	arch/x86: update assembly to ensure 16-byte alignment into C	Aaron Durbin
2017-06-29	soc/intel/common/block/gpio: Port gpio code from Apollolake to common	Hannah Williams
2017-06-29	soc/intel/cannonlake: Add initial dummy directory	Lijian Zhao
2017-06-29	soc/amd/stoneyridge: Convert monotonic timer	Marshall Dawson
2017-06-28	soc/amd/stoneyridge: Revise pci_devs.h file	Marshall Dawson
2017-06-28	soc/amd/stoneyridge: Fix device IDs	Marshall Dawson
2017-06-28	soc/amd/stoneyridge: Enable early cbmem	Marshall Dawson
2017-06-27	soc/amd/stoneyridge: Add tseg size to Kconfig	Marshall Dawson
2017-06-27	soc/stoneyridge: Remove IDE controller	Marshall Dawson
2017-06-27	soc/stoneyridge: Remove FCH PCIe support	Marshall Dawson
2017-06-27	soc/amd/stoneyridge: Remove PCIe-PCI bridge	Marshall Dawson
2017-06-27	soc/amd/common: Fix most checkpatch errors	Marshall Dawson
2017-06-27	soc/amd/stoneyridge: Fix most checkpatch errors	Marshall Dawson
2017-06-27	soc/amd/stoneyridge/acpi: Fix checkpatch errors	Marshall Dawson
2017-06-27	vendorcode/amd: Unify Porting.h across all targets	Stefan Reinauer
2017-06-27	soc/intel/common/opregion: Use enum cb_err as return value	Patrick Rudolph
2017-06-27	soc/intel/quark: We're not Broadwell anymore	Stefan Reinauer
2017-06-27	soc/intel/skylake: storage: Use word access for power state registers	Duncan Laurie
2017-06-27	soc/intel/skylake: storage: Add 2ms delay before exiting D3	Duncan Laurie
2017-06-26	soc/intel/fsp_baytrail/include/soc/pci_devs.h: Add brackets around macro	Elyes HAOUAS
2017-06-26	soc/amd/stoneyridge: Add northbridge support	Marc Jones
2017-06-26	soc/amd/stoneyridge: Add CPU files	Marc Jones
2017-06-26	soc: Add AMD Stoney Ridge southbridge code	Marc Jones
2017-06-26	rockchip/rk3399: update the ddr 200MHz frequency configuration	Caesar Wang
2017-06-23	soc/intel/skylake: Remove post SMM Relocation uCode loading	Barnali Sarkar