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AgeCommit message (Expand)Author
2020-05-11soc/intel/skylake: Allow setting of PcieRpMaxPayloadWim Vervoorn
2020-05-11soc/sifive/fu540: Add missing '#include <commonlib/bsd/helpers.h>'Elyes HAOUAS
2020-05-11soc/intel/tigerlake: Update C-State infoWonkyu Kim
2020-05-11soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKXMichael Niewöhner
2020-05-11soc/intel/jasperlake: Add ACPI device name for Storage controllersKarthikeyan Ramasubramanian
2020-05-11soc/intel/jasperlake: Enable end of post support in FSPAamir Bohra
2020-05-10src: Replace remaining GPLv2 long form headers with SPDX headerElyes HAOUAS
2020-05-09src/: Replace GPL boilerplate with SPDX headersPatrick Georgi
2020-05-09vboot: Clean up pre-RAM use of vboot_recovery_mode_enabled()Julius Werner
2020-05-08{security,soc}/*/Kconfig: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS
2020-05-08soc/nvidia: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS
2020-05-08soc/qualcomm: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS
2020-05-08soc/intel: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS
2020-05-08soc/intel/skl: Drop `acpi_mainboard_gnvs`Angel Pons
2020-05-07soc/intel/tigerlake: Add PMC to platform ACPI name entryJohn Zhao
2020-05-07soc/amd/common/block/lpc: Use standard pci_dev_ops_pciFurquan Shaikh
2020-05-06treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi
2020-05-06treewide: move copyrights and authors to AUTHORSPatrick Georgi
2020-05-06treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi
2020-05-06soc/intel/tgl: Synchronize GPIO ASL table with Linux kernelShaunak Saha
2020-05-06soc/intel/tigerlake: Print HPR_CAUSE0 registerderek.huang
2020-05-05soc/intel/jasperlake: Correct the EMMC PCR Port IDRonak Kanabar
2020-05-05soc/intel/jasperlake: Allow SD card power enable polarity configurationRonak Kanabar
2020-05-05soc/intel/tigerlake: Add PMC mux controlJohn Zhao
2020-05-05soc/amd/picasso: add Kconfig option to disable rom sharingAaron Durbin
2020-05-05soc/amd/common/block/lpc: Add lpc_disable_spi_rom_sharingRaul E Rangel
2020-05-04soc/intel/tigerlake: Update interrupt settingWonkyu Kim
2020-05-04src/soc/tigerlake: Update SerialIoDebugMode UPD in FSP-MSrinidhi N Kaushik
2020-05-04soc/intel/skl: always enable SataPwrOptEnableMichael Niewöhner
2020-05-04soc/intel/cannonlake: Add DisableHeciRetry to configChristian Walter
2020-05-04soc/intel/common/block/cse: Add boot partition related APIsSridhar Siricilla
2020-05-02soc/amd/picasso: Select CHROMEOS_RAMOOPS_DYNAMICFurquan Shaikh
2020-05-02acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh
2020-05-01soc/amd/picasso: add sd/emmc0 configuration to chip.hAaron Durbin
2020-05-01soc/amd/picasso: Add FSP support for including AGESAMarshall Dawson
2020-05-01src/soc/amd/picasso: Add methods to save and restore MTRRsRaul E Rangel
2020-05-01soc/intel/xeon_sp/cpx: Implement hide/unhide P2SB traditional danceAndrey Petrov
2020-05-01soc/intel/xeon_sp/cpx: Enable common P2SBAndrey Petrov
2020-05-01soc/intel/xeon_sp: Add C620 p2sb.hAndrey Petrov
2020-05-01xeon_sp, ocp/tiogapass: remove unused FSP-style GPIO defsMaxim Polyakov
2020-05-01soc/intel/baytrail: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-05-01soc/intel/baytrail: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-05-01soc/intel/braswell: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-05-01soc/intel/cannonlake: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-05-01soc/intel/common: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-05-01soc/intel/broadwell: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-05-01soc/amd/picasso: initialize i2c controllers in SoC flowAaron Durbin
2020-05-01soc/amd/picasso/bootblock: Remove duplicate sb_reset_i2c_slavesRaul E Rangel
2020-05-01soc/amd/picasso/bootblock/bootblock: Remove duplicate i2c initRaul E Rangel
2020-05-01soc/amd/picasso: Allow mainboard to provide pci ddi descriptorsAaron Durbin