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AgeCommit message (Expand)Author
2017-08-25soc/intel/cannonlake: Init UPD params based on configPratik Prajapati
2017-08-25soc/intel/skylake: Remove TCO lock down programmingSubrata Banik
2017-08-25soc/intel/common: Add function to DLOCK PR registersBarnali Sarkar
2017-08-25soc/intel/skylake: Move PMC lock down config after resource allocationSubrata Banik
2017-08-25soc/intel/skylake: Remove ABASE lock down programmingSubrata Banik
2017-08-25soc/intel/skylake: Move LPC lock down config after resource allocationSubrata Banik
2017-08-25soc/intel/common: Move update_mrc_cache after BS_DEV_ENUMERATESubrata Banik
2017-08-25soc/intel/skylake: Add LPC and SPI lock down config optionSubrata Banik
2017-08-25amd/pi/hudson: Fix FCH ECMartin Roth
2017-08-25soc/amd/stoneyridge: Move IMC ASL sourceKyösti Mälkki
2017-08-25soc/amd/stoneyridge: Move oem_fan_control()Kyösti Mälkki
2017-08-24soc/intel/cannonlake: Add cpu.c and MP init supportPratik Prajapati
2017-08-23soc/intel/skylake: Usable dram top calculation based on HW registersSubrata Banik
2017-08-23soc/intel/common: Early system agent library access in postcar stageSubrata Banik
2017-08-23soc/intel/common: Add functions into common system agent librarySubrata Banik
2017-08-23soc/intel/apollolake: Allow overriding dev tree settings by boardKane Chen
2017-08-23soc/amd/stoneyridge ACPI: Sync sleepstates.asl definitionsKyösti Mälkki
2017-08-22soc/intel/cannonlake: Define soc_intel_cannonlake_configPratik Prajapati
2017-08-22soc/intel/skylake: Lock sideband access in coreboot and not in FSPBarnali Sarkar
2017-08-21soc/intel/cannonlake: Enable common PMC code for CNLLijian Zhao
2017-08-21soc/intel/skylake: Fix SGX init sequencePratik Prajapati
2017-08-21intel/common/block/sgx: Refactor SGX common codePratik Prajapati
2017-08-21intel/common/mp_init: Refactor MP Init code to get rid of microcode paramPratik Prajapati
2017-08-21intel/common/sgx: Use intel_mp_current_microcode() to get microcode pointerPratik Prajapati
2017-08-21soc/intel/cannonlake: Add support for all UART port indexSubrata Banik
2017-08-21soc/intel/skylake: Add support for all UART port indexSubrata Banik
2017-08-21soc/intel/cannonlake: Add Kconfig option to select UART indexSubrata Banik
2017-08-21soc/intel/skylake: Add Kconfig option to select UART indexSubrata Banik
2017-08-21soc/intel/apollolake: remove duplicate gpio GPE definesAaron Durbin
2017-08-21intel/common/cpu: Add function to get microcode patch pointerPratik Prajapati
2017-08-21soc/intel/common/smbus: Don't clear random bitsNico Huber
2017-08-19arch/x86: Sanity checking on HAVE_SMI_HANDLERKyösti Mälkki
2017-08-19soc/intel/skylake: Enable power button SMI when jumping to payloadFurquan Shaikh
2017-08-18Reinvent I2C opsNico Huber
2017-08-18include/device: Split i2c.h into threeNico Huber
2017-08-17soc/intel/common/block: Add functions to common CPU library codeShaunak Saha
2017-08-17soc/intel/cannonlake: Add SPI flash controller driverLijian Zhao
2017-08-17intel/cannonlake/chip: Add initial PCI enum supportPratik Prajapati
2017-08-17intel/common/block/fast_spi: Add config option to disable write statusDuncan Laurie
2017-08-17soc/intel/apollolake: Fix CONFIG_FSP_CAR build errorMarshall Dawson
2017-08-17soc/intel/skylake: Configure FSP to skip ME MBP stepDuncan Laurie
2017-08-16soc/intel/cannonlake: Add proper support to enable UART2 in 16550 modeSubrata Banik
2017-08-16soc/intel/skylake: Add proper support to enable UART2 in 16550 modeSubrata Banik
2017-08-15soc/intel/cannonlake: Rectify LPC Lock Enable (LE) bit definitionSubrata Banik
2017-08-15soc/intel/common/block: Fix PMC common block dependencyShaunak Saha
2017-08-15soc/intel/apollolake: Rename SRAM BAR0 and BAR2 macrosV Sowmya
2017-08-15soc/intel/apollolake: Provide option to use Common MP InitBarnali Sarkar
2017-08-15soc/intel/cannonlake: Call into FSP siliconinitLijian Zhao
2017-08-15soc/intel/cannonlake: Add postcar stage supportLijian Zhao
2017-08-15soc/intel/common/block: Add LPC Common code and use it for APLRavi Sarawadi