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path: root/src/soc
AgeCommit message (Expand)Author
2020-08-14soc/intel/common/cse_lite: Perform a board specific resetKarthikeyan Ramasubramanian
2020-08-13soc/intel/skylake: Refactor ternary expressionsFelix Singer
2020-08-13drivers/intel/fsp2_0: don't select FSP_USES_CB_STACK on FSP 2.0 platformFelix Held
2020-08-13soc/intel/xeon_sp/cpx: add CPUID for CPX-SP A1 processorJonathan Zhang
2020-08-13soc/mediatek/mt8192: Add spi driverQii Wang
2020-08-13soc/intel/common/block: Stitch CSE blobs into FW_MAIN_X partitionsSridhar Siricilla
2020-08-13soc/mediatek/mt8192: Add DRAM resource in ramstageCK Hu
2020-08-13soc/mediatek/mt8192: Initialize build rulesCK Hu
2020-08-13soc/mediatek/mt8192: Add a placeholder for the EMI driverCK Hu
2020-08-12soc/intel/cannonlake: Set FSP-M UPD Heci1BarAddressSridhar Siricilla
2020-08-12soc/amd/common/espi_util: rename espi_check_statusFelix Held
2020-08-12soc/intel/common/block/sata: Add common SATA driverSubrata Banik
2020-08-12soc/intel/tigerlake: Add IRQs for LPSS uartPatrick Rudolph
2020-08-12soc/mediatek/mt8192: Add PLL and clock init supportWeiyi Lu
2020-08-12soc/mediatek/mt8192: Add gpio driverCK Hu
2020-08-12soc/mediatek/mt8183: Transfer ddr geometry type to dram blobHuayang Duan
2020-08-11amd/picasso/acpi: Add power resources for UART0Kangheui Won
2020-08-11soc/intel/common/block/gspi: Recalculate BAR after resource allocationJes Klinke
2020-08-11xeon_sp/cpx: Enable PCH thermal device via FSPJohnny Lin
2020-08-11soc/amd/picasso: Correct processor ACPI scopeJason Glenesk
2020-08-11soc/amd/common/espi_util: espi_send_command: improve error messageFelix Held
2020-08-11soc/amd/common/espi_util: espi_std_io_decode: fix edge case bugFelix Held
2020-08-11soc/amd/common/espi_util: simplify espi_std_io_decode functionFelix Held
2020-08-11soc/amd/common/espi_util: make decode enable parameter uint32_tFelix Held
2020-08-11soc/amd/common/espi_util: make reg parameter unsignedFelix Held
2020-08-11soc/amd/stoneyridge/acpi: clean up global NVSFelix Held
2020-08-10soc/intel/apollolake: Rename UART irqsPatrick Rudolph
2020-08-10soc/intel/apollolake: Add irq.hPatrick Rudolph
2020-08-10soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devicesPatrick Rudolph
2020-08-09soc/intel/{icl.tgl,jsl}: Remove SMRAM register programmingAamir Bohra
2020-08-08vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww32 release and adapt socJonathan Zhang
2020-08-08soc/intel/skylake: Enable CIO depending on devicetree configurationFelix Singer
2020-08-08soc/intel/skylake: Enable SA IMGU depending on devicetree configurationFelix Singer
2020-08-08soc/intel/skylake: Add IMGU definitions to pci_devs.hFelix Singer
2020-08-08soc/intel/skylake: Enable SDXC depending on devicetree configurationFelix Singer
2020-08-08soc/mediatek/mt8192: Add initial config for new ARMv8 device MT8192CK Hu
2020-08-07soc/intel/skylake: Enable thermal subsystem depending on devicetreeFelix Singer
2020-08-07soc/intel/skylake: Add SA thermal subsystem definitions to pci_devs.hFelix Singer
2020-08-07soc/intel/cnl: Set Heci1Disable depending on devicetree configFelix Singer
2020-08-07soc/amd/picasso/acpi: remove AOAC device enables from global NVSFelix Held
2020-08-07xeon_sp/cpx: Enable HWP Intel Speed ShiftJohnny Lin
2020-08-07soc/intel/broadwell/iobp: Log success in `pch_iobp_write()`Angel Pons
2020-08-07soc/intel/common: Log CSE FW Status Registers before triggering recoverySridhar Siricilla
2020-08-07soc/intel/{cnl,icl,jsl,tgl}: Use Bus Master for setting up PWRMBASESubrata Banik
2020-08-07src/soc/intel/icelake: Allow option to use USE_INTEL_FSP_MP_INITSubrata Banik
2020-08-06soc/intel/tigerlake: add common routine for DDR initNick Vaccaro
2020-08-06soc/intel/common/block/cpu: Refactor init_cpus functionSubrata Banik
2020-08-06soc/mediatek/mt8183: Set MMU default map length to 8GB befor mem initHuayang Duan
2020-08-06soc/mediatek/mt8183: Add ddr geometry to support 6GB, 8GB DDR bootupHuayang Duan
2020-08-06soc/mediatek/mt8183: Adjust tRFCab and tRFCpb by the density valueHuayang Duan