Age | Commit message (Expand) | Author |
2015-03-04 | coreboot t132: Stack init re-work | Furquan Shaikh |
2015-03-04 | t132: kick off core complex after loading MTS microcode | Aaron Durbin |
2015-03-04 | t132: load MTS microcode | Aaron Durbin |
2015-03-04 | t132: Replace fallback with CONFIG_CBFS_PREFIX | Marc Jones |
2015-03-04 | t132: Add shared romstage | Aaron Durbin |
2015-03-04 | coreboot rush: Add dram init code | Furquan Shaikh |
2015-03-04 | coreboot rush: Add support for basic romstage | Furquan Shaikh |
2015-03-04 | coreboot t132: Enable loading of romstage from CBFS media | Furquan Shaikh |
2015-03-04 | coreboot t132: Remove init pllx for now | Furquan Shaikh |
2015-03-04 | coreboot t132,rush: Add mainboard specific bootblock_init | Furquan Shaikh |
2015-03-03 | coreboot t132: Add clock.c to all three stages of coreboot | Furquan Shaikh |
2015-03-02 | coreboot arm: Define function for setting cntfrq register | Furquan Shaikh |
2015-03-02 | tegra132: Enable bootblock support in tegra132 including UART support | Furquan Shaikh |
2015-02-27 | x86: Fix pointer arithmetic regressions from MMIO changes | Kevin Paul Herbert |
2015-02-25 | tegra124: Clean up ARM UART driver build | Marc Jones |
2015-02-25 | soc/intel/baytrail/Kconfig: Remove explicit `HAVE_MONOTONIC_TIMER` | Paul Menzel |
2015-02-25 | intel/broadwell: free local heap object | Patrick Georgi |
2015-02-24 | soc/fsp_baytrail: Fix use of microcode-related Kconfig variables | Alexandru Gagniuc |
2015-02-17 | tegra132: Postprocess bootblock properly | Patrick Georgi |
2015-02-17 | tegra132: Add BCT support in tegra132 soc | Furquan Shaikh |
2015-02-17 | T124: perform ram_repair when CPU rail is powered on in warmboot | Yen Lin |
2015-02-17 | T124: perform ram_repair when CPU rail is powered on in coldboot | Yen Lin |
2015-02-17 | tegra124: Correct cpu power on sequence and CPUPWRGOOD_TIME | Jimmy Zhang |
2015-02-16 | acpi: Generate valid ACPI processor objects | Timothy Pearson |
2015-02-15 | x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer | Kevin Paul Herbert |
2015-02-13 | tegra132: Fix build for verstage | Marc Jones |
2015-02-13 | fsp_baytrail: Add macros to define 20K pull-up and down | Werner Zeh |
2015-02-10 | Baytrail_fsp: Make ME path configurable in menuconfig | Werner Zeh |
2015-02-09 | fsp_baytrail: Get FSP reserved memory from the FSP HOB list | Martin Roth |
2015-02-09 | Intel FSP platforms: Fix timestamps | Kyösti Mälkki |
2015-02-06 | include/types.h: Provide BIT() macro | Alexandru Gagniuc |
2015-02-06 | FSP & CBMEM: Fix broken cbmem CAR transition. | Martin Roth |
2015-01-27 | CBMEM: Always use DYNAMIC_CBMEM | Kyösti Mälkki |
2015-01-27 | CBMEM: Do not use get_top_of_ram() with DYNAMIC_CBMEM | Kyösti Mälkki |
2015-01-27 | CBMEM: Move cbmemc_reinit() | Kyösti Mälkki |
2015-01-27 | vboot2: implement select_firmware for pre-romstage verification | Daisuke Nojiri |
2015-01-27 | vboot2: add verstage | Stefan Reinauer |
2015-01-26 | tegra132: Add support for tegra132 soc | Furquan Shaikh |
2015-01-16 | baytrail: there is a chance that USBPHY_COMPBG is set to 0 | Kane Chen |
2015-01-16 | baytrail: use the setting in devicetree.cb to config USBPHY_COMPBG | Kane Chen |
2015-01-14 | baytrail broadwell: Use timestamps internal stash | Kyösti Mälkki |
2015-01-14 | Revert "vboot2: add verstage" | Paul Menzel |
2015-01-13 | vboot2: add verstage | Daisuke Nojiri |
2015-01-13 | soc/intel/fsp_baytrail/gpio.c: Silence unused variable warning | Edward O'Callaghan |
2015-01-12 | soc/intel/broadwell/me.c: Prevent unused function warning | Edward O'Callaghan |
2015-01-12 | soc/intel/broadwell/spi_loading.c: Remove dead code | Edward O'Callaghan |
2015-01-09 | nyan*: I2C: Fix bus clear BC_TERMINATE naming. | Tom Warren |
2015-01-09 | tegra124: fix and fine tune the warm boot code | Joseph Lo |
2015-01-09 | tegra: i2c: re-init i2c controller after reset | Jimmy Zhang |
2015-01-09 | storm: Reserve memory from 0x4000_0000-0x414f_ffff | David Hendricks |