summaryrefslogtreecommitdiff
path: root/src/soc
AgeCommit message (Expand)Author
2015-04-04tegra124: use known-good drive for fast-train onlyNeil Chen
2015-04-04tegra124: add support for full DP link trainingNeil Chen
2015-04-04rk3288: Replace SPI fifo_size with constantDavid Hendricks
2015-04-04rk3288: Pass SPI bus speed in as parameter to init functionDavid Hendricks
2015-04-03tegra132: implement platform_prog_run()Aaron Durbin
2015-04-03tegra124: implement platform_prog_run()Aaron Durbin
2015-04-03rmodule: use struct prog while loading rmodulesAaron Durbin
2015-04-02pinky: Move some init to mainboard bootblockDavid Hendricks
2015-04-02rk3288/pinky: Move uart address to mainboard KconfigDavid Hendricks
2015-04-02rk3288: remove duplicated #define `PERI_ACLK_DIV_SHIFT`Aaron Durbin
2015-04-02Nyans: replace cpu_reset with hard_resetDaisuke Nojiri
2015-04-02Broadwell: Select PCIE_L1_SUB_STATE and apply Broadwell settings.Kenji Chen
2015-04-02pistachio: add gpio type definitionVadim Bendebury
2015-04-02urara: Fix CBFS header definitionsVadim Bendebury
2015-04-02coreboot: rk3288: add new ddr config and support ddr3 freq up to 800mhzjinkun.hong
2015-04-02rockchip: support pwm regulatorhuang lin
2015-04-02rockchip: support i2c clock settinghuang lin
2015-04-02veyron_pinky: Add rev2 support, clean up mainboard.cJulius Werner
2015-04-02veyron: select rw romstage using vboot2Daisuke Nojiri
2015-04-02broadwell: Disable ADSP power gating feature by defaultDuncan Laurie
2015-04-02broadwell: Add event log entry for GPIO27Duncan Laurie
2015-04-02Broadwell: Reg_Script: add END tag to array "smbus_init_script"Ryan Lin
2015-04-02Broadwell: Synchronize for power management with FRCKenji Chen
2015-04-02Broadwell: Synchronize RO, Link Arbiter, and OBFF with FRCKenji Chen
2015-04-02Broadwell: Revise programming flow for write-once registersKenji Chen
2015-04-02broadwell: Configure IOSF Port and Grant CountKenji Chen
2015-04-02Samus: Synchronization with FRC to enable PCIe Relaxed Order.Kenji Chen
2015-04-02baytrail: Change USB3 PLL VCO and iCLK PLL current on BYT-M/D CPUKein Yuan
2015-04-02broadwell: Update PCIe configuration to follow BWGKane Chen
2015-04-02broadwell: Clear pending GPE events before entering sleep stateDuncan Laurie
2015-04-02Baytrail: Change PCIe root disable algorithmKenji Chen
2015-04-02Baytrail: add _PRT to each PCIe root port deviceTed Kuo
2015-04-02ipq806x: provide soc specific CBMEM_CONSOLE_PRERAM_BASEVadim Bendebury
2015-04-02broadwell: Add reporting of broadwell MCH revisionDuncan Laurie
2015-04-02broadwell: Change CPUID 306D4 to report "E0 or F0"Duncan Laurie
2015-04-02broadwell: me: Fix typo and add missing phase stateDuncan Laurie
2015-04-01cbfs: correct types used for accessing filesAaron Durbin
2015-03-31cbfs: remove cbfs_core.h includesAaron Durbin
2015-03-30broadwell: fix HAVE_REFCODE_BLOB build errorsAaron Durbin
2015-03-30baytrail: fix HAVE_REFCODE_BLOB build errorsAaron Durbin
2015-03-30Update hex values to CBFS binary name types in MakefilesMartin Roth
2015-03-30imgtec/pistachio: Bring uart driver to modern standardsPatrick Georgi
2015-03-28pistachio: don't open code ramstage loadingAaron Durbin
2015-03-28storm: need larger CBFS cacheVadim Bendebury
2015-03-28tegra132: Add support for pmc_rst_status get and printFurquan Shaikh
2015-03-28tegra132: Replace use of clk_rst with CLK_RST_REGFurquan Shaikh
2015-03-28tegra132: measure romstage timingsAaron Durbin
2015-03-28tegra132/rush/ryu: Use CLK_RST_REG instead of &clk_rst->...Furquan Shaikh
2015-03-28tegra132: Clean up clock register writesFurquan Shaikh
2015-03-28Ryu: Move I2C6 init to ramstageTom Warren
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-27 20:40:11 +0000