coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-03-15	soc/intel/tigerlake: Match RP number with TGL EDS	Wonkyu Kim
2020-03-15	soc/intel/tigerlake: Enable CNVi through dev_enabled	Srinidhi N Kaushik
2020-03-15	soc/intel/tigerlake: Update Cpu Ratio settings	Srinidhi N Kaushik
2020-03-15	soc/intel/tigerlake: Configure Vmx support using Kconfig	John Zhao
2020-03-12	soc/intel/tigerlake: Enable VT-d and generate DMAR ACPI table	John Zhao
2020-03-12	soc/intel/*/smihandler: Only compile in TCO SMI handler if needed	Patrick Georgi
2020-03-12	soc/intel/tigerlake: Configure L1Substates for PCH Root ports	Wonkyu Kim
2020-03-12	vboot: remove extraneous vboot_recovery_mode_memory_retrain	Joel Kitching
2020-03-12	soc/intel/tigerlake: Enable HDA through dev_enabled	Srinidhi N Kaushik
2020-03-11	soc/intel/common/block/smm: add case intrusion to SMI handler	Michael Niewöhner
2020-03-11	soc/intel/tigerlake: Save DIMM info by available nodes	Jamie Ryu
2020-03-11	soc/intel/tigerlake: Correct FSP log interface	Ronak Kanabar
2020-03-11	soc/intel/tigerlake: Fix stale device pointer usage	Karthikeyan Ramasubramanian
2020-03-11	soc/intel/common/block: tco: enable intruder SMI if selected	Michael Niewöhner
2020-03-10	soc/intel/common: Add more GPIO definition macros	Nico Huber
2020-03-10	soc/intel/dnv: Set INT_LINE accouting for PIRQ routing & swizzling	Stephen Douthit
2020-03-10	soc/intel/dnv: Add ACPI _PRT methods for virtual root ports	Stephen Douthit
2020-03-10	soc/intel/dnv: Fix ACPI reporting of root port interrupt routing	Stephen Douthit
2020-03-10	src: Remove unneeded 'include <arch/cache.h>'	Elyes HAOUAS
2020-03-10	soc/intel/dnv: Don't clobber SATA_MAP while trying to set mode	Stephen Douthit
2020-03-10	soc/intel: fix eist enabling	Matt Delco
2020-03-10	soc/intel/xeon-sp,mb/ocp/tiogapass: Don't fake binaries	Nico Huber
2020-03-10	soc/intel/tigerlake: Enable Hybrid storage mode	Wonkyu Kim
2020-03-09	soc/intel/braswell/chip.h: Include smbios.h for Type9 Entries	Michał Żygowski
2020-03-07	soc/intel/tigerlake: Avoid NULL pointer dereference	John Zhao
2020-03-07	intel/soc: skl,apl,cnl,icl,tgl: add INTRUDER relevant registers	Michael Niewöhner
2020-03-07	intel/soc: skl,apl,cnl,icl,tgl,common: enable TCO SMIs if selected	Michael Niewöhner
2020-03-07	soc/intel/common/block/smm: add Kconfig for TCO SMI	Michael Niewöhner
2020-03-07	soc/intel/braswell: Generate microcode binaries from tree	Michał Żygowski
2020-03-06	soc/intel/tigerlake: Enable CNVi Mode	Srinidhi N Kaushik
2020-03-06	soc/intel: Add Intel Xeon Scalable Processor support	Jonathan Zhang
2020-03-06	soc/intel/common/block/tco: clear TCO1_STS register, too	Michael Niewöhner
2020-03-06	soc/mediatek/mt8183: Improve the DRAMC runtime config flow	Huayang Duan
2020-03-06	soc/mediatek/mt8183: Do TX tracking for DRAM DVFS feature	Huayang Duan
2020-03-06	soc/mediatek/mt8183: Correct EMI bandwidth threshold for DVFS switch	Huayang Duan
2020-03-06	soc/apl: add options to override USB port config	Maxim Polyakov
2020-03-06	soc/intel/tigerlake: Avoid NULL pointer dereference	John Zhao
2020-03-04	soc/intel/denverton_ns: Allow including microcode	Felix Singer
2020-03-04	soc/intel/cpu: Select NO_FIXED_XIP_ROM_SIZE	Arthur Heymans
2020-03-04	src: capitalize 'PCIe'	Elyes HAOUAS
2020-03-04	soc/intel/skylake/elog: fix BUG: pch_log_rp_wake_source requests hidden	Michael Niewöhner
2020-03-04	soc/intel/tigerlake: Update SerialIoUart settings for Tiger Lake	Srinidhi N Kaushik
2020-03-04	soc/intel/denverton_ns: Allow using FSP repo	Felix Singer
2020-03-03	soc/intel/apl: disable NPK device in devicetree.cb	Maxim Polyakov
2020-03-03	soc/intel/gpio_defs: add a new macro for pad config	Maxim Polyakov
2020-03-03	soc/intel/tigerlake: configure ethernet	Wonkyu Kim
2020-03-03	soc/broadwell: hook up smmstore	Matt DeVillier
2020-03-03	soc/braswell: hook up smmstore	Matt DeVillier
2020-03-03	soc/baytrail: hook up smmstore	Matt DeVillier
2020-03-03	soc/intel/tigerlake: Add Jasper lake GPIO support	Ronak Kanabar