coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2017-10-12	soc/intel/cannonlake: add length information for communities	Bora Guvendik
2017-10-12	soc/intel/cannonlake: Add ACPI platform sleep capability	Vaibhav Shankar
2017-10-12	soc/amd/stoneyridge: Clean up sata.c	Richard Spiegel
2017-10-12	intel/fsp_broadwell_de: Add timestamp functionality	Werner Zeh
2017-10-12	soc/intel/skylake: Enable bus master for sata	Kane Chen
2017-10-11	soc/intel/cannonlake: Change default UART number to 2	Lijian Zhao
2017-10-10	soc/intel/skylake: Fix broken suspend/resume for deep S3	Furquan Shaikh
2017-10-09	soc/intel/*lake: Load vbt when it's needed	Patrick Georgi
2017-10-06	soc/intel/skylake: use locate_vbt directly instead of calling a wrapper	Patrick Georgi
2017-10-06	soc/intel/common: refactor locate_vbt and vbt_get	Patrick Georgi
2017-10-06	soc/intel/common: refactor locate_vbt	Patrick Georgi
2017-10-06	soc/intel/common: Allow overriding CBFS filename of VBT	Patrick Georgi
2017-10-06	soc/intel/cannonlake: Enable MRC cache	Lijian Zhao
2017-10-06	soc/intel/cannonlake: reduce bootblock size	Aaron Durbin
2017-10-06	soc/intel/common: remove invalid path from Kconfig include	Aaron Durbin
2017-10-05	soc/intel/cannonlake: Add all the SOC level DSDT tables	Lijian Zhao
2017-10-05	soc/intel/skylake: Add support in SKL for PMC common code	Shaunak Saha
2017-10-05	soc/intel/common/block: Manage power state variable from common PMC block	Shaunak Saha
2017-10-05	soc/amd/stoneyridge: Pass firmware dir location to amdfwtool	Martin Roth
2017-10-05	soc/intel/{common,apollolake}: Add checks to handle negative values	Rizwan Qureshi
2017-10-05	soc/intel/skylake: Add config for mbx command for Intersil VR C-state issues	Rizwan Qureshi
2017-10-05	vendor/intel/skykabylake: Update FSP header files to version 2.7.2	Balaji Manigandan B
2017-10-04	chromeec: Remove checks for EC in RO	Daisuke Nojiri
2017-10-04	soc/amd/stoneyridge: Drop some amdlib.h includes	Kyösti Mälkki
2017-10-03	soc/intel/cannonlake: change gpio device name	Bora Guvendik
2017-10-03	soc/intel/cannonlake: Disable CPU ratio override	Lijian Zhao
2017-10-03	soc/intel/cannonlake: add initial ASL methods for SCS, GPIO	Bora Guvendik
2017-10-03	soc/intel/cannonlake: Add northbridge dsdt table	Lijian Zhao
2017-10-03	soc/intel/cannonlake: Fill the SMI usage	Lijian Zhao
2017-10-03	soc/intel/cannonlake: Add lpc pci driver	Lijian Zhao
2017-10-03	soc/intel/skylake: Enable common LPC IP	Ravi Sarawadi
2017-10-03	soc/intel/common/block: Update LPC lib	Ravi Sarawadi
2017-10-03	soc/amd/stoney: Allow alternative placement for AMD FW directory	Martin Roth
2017-10-03	soc/amd/stoneyridge: Wait for UART to be ready	Marc Jones
2017-10-02	amd/stoneyridge: Remove 16MB cbmem assert	Marshall Dawson
2017-10-02	soc/intel/common/block: Move power button SMI functions to common PMC block	Shaunak Saha
2017-10-02	soc/intel/skylake: Use common/block/gpio	Hannah Williams
2017-10-02	amd/stoneyridge: Change SMM setup functions	Marshall Dawson
2017-10-02	amd/stoneyridge: Add PM defintions to southbridge.h	Marshall Dawson
2017-10-02	amd/stoneyridge: Refactor SMI handler	Marshall Dawson
2017-10-02	amd/stoneyridge: Clean up smihandler.c	Marshall Dawson
2017-10-02	amd/stoneyridge: Check SMI command address before reading	Marshall Dawson
2017-10-02	amd/stoneyridge: Move pm/smi_read/write functions to util file	Marshall Dawson
2017-10-02	amd/stoneyridge: Add pm_read32 and pm_write32 to southbridge	Marshall Dawson
2017-10-02	amd/stoneyridge: Fix pm_read16 argument size	Marshall Dawson
2017-10-02	amd/stoneyridge: Clean up smi_util.c	Marshall Dawson
2017-10-02	amd/stoneyridge: Add more SMM definitions	Marshall Dawson
2017-10-02	amd/stoneyridge: Add uart.c to smm-y list	Marshall Dawson
2017-10-02	soc/amd/common: Add framework for missing AGESA callouts	Martin Roth
2017-10-02	soc/amd/stoneyridge/southbridge.c: Remove preprocessor #if	Richard Spiegel